Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8141068 | Compiler with flexible scheduling | — | 2012-03-20 |
| 7334112 | Method and apparatus for managing access to out-of-frame registers | Achmed R. Zahir, Cary A. Coutant, Jonathan Ross | 2008-02-19 |
| 7272702 | Method and apparatus for managing access to out-of-frame registers | Achmed R. Zahir, Cary A. Coutant, Jonathan Ross | 2007-09-18 |
| 7065754 | Method and apparatus for switching between multiple implementations of a routine | Cary A. Coutant | 2006-06-20 |
| 7013460 | Specifying an invariant property (range of addresses) in the annotation in source code of the computer program | Jeff Littfin | 2006-03-14 |
| 6986131 | Method and apparatus for efficient code generation for modulo scheduled uncounted loops | Uma Srinivasan, Richard E. Hank, Dale Morris | 2006-01-10 |
| 6951015 | Prefetch insertion by correlation of cache misses and previously executed instructions | — | 2005-09-27 |
| 6898787 | Method and apparatus for ordered predicate phi in static single assignment form | Vatsa Santhanam, Dz-ching Ju, Vasanth Bala | 2005-05-24 |
| 6883166 | Method and apparatus for performing correctness checks opportunistically | — | 2005-04-19 |
| 6880153 | Method and apparatus for varying the level of correctness checks executed when performing correctness checks opportunistically using spare instruction slots | Michael L. Ziegler | 2005-04-12 |
| 6874138 | Method and apparatus for resuming execution of a failed computer program | Michael L. Ziegler | 2005-03-29 |
| 6845501 | Method and apparatus for enabling a compiler to reduce cache misses by performing pre-fetches in the event of context switch | Michael L. Zi gler, Jerome C. Huck, Lawrence D. K. B. Dwyer | 2005-01-18 |
| 6708288 | Compiler-based checkpointing for support of error recovery | Michael L. Ziegler, Lawrence D. K. B. Dwyer | 2004-03-16 |
| 6701518 | System and method for enabling efficient processing of a program that includes assertion instructions | Lawrence D. K. B. Dwyer | 2004-03-02 |
| 6665793 | Method and apparatus for managing access to out-of-frame Registers | Achmed R. Zahir, Cary A. Coutant, Jonathan Ross | 2003-12-16 |
| 6658656 | Method and apparatus for creating alternative versions of code segments and dynamically substituting execution of the alternative code versions | — | 2003-12-02 |
| 6654877 | System and method for selectively executing computer code | Jerome C. Huck | 2003-11-25 |
| 6643769 | System and method for enabling selective execution of computer code | Jerome C. Huck | 2003-11-04 |
| 6314513 | Method and apparatus for transferring data between a register stack and a memory resource | Jonathon K. Ross, Cary A. Coutant, Achmed R. Zahir | 2001-11-06 |
| 6275981 | Method and system for correlating profile data dynamically generated from an optimized executable program with source code statements | William B. Buzbee, Michelle A. Ruscetta | 2001-08-14 |
| 6263401 | Method and apparatus for transferring data between a register stack and a memory resource | Jonathan Ross, Cary A. Coutant, Achmed R. Zahir | 2001-07-17 |
| 6065114 | Cover instruction and asynchronous backing store switch | Achmed R. Zahir, Jonathan Ross, Cary A. Coutant, Prasad Raje, Sunil Saxena | 2000-05-16 |
| 5915117 | Computer architecture for the deferral of exceptions on speculative instructions | Jonathan Ross, Jack Mills, James O. Hays, Stephen G. Burger, Dale Morris +4 more | 1999-06-22 |