Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417406 | Virtualizing external memory as local to a machine learning accelerator | Lawrence J. Madar, III, Temitayo Fadelu, Ravi Narayanaswami | 2025-09-16 |
| 12265492 | Circular buffer for input and output of tensor computations | Liangzhen Lai, Yu-Hsin Chen, Kyong Ho Lee, Xu Chen | 2025-04-01 |
| 12197362 | Batch matrix multiplication operations in a machine learning accelerator | Yu-Hsin Chen, Liangzhen Lai, Kyong Ho Lee | 2025-01-14 |
| 12061968 | Neural network instruction set architecture | Ravi Narayanaswami, Dong Hyuk Woo, Olivier Temam | 2024-08-13 |
| 12001893 | Distributed synchronization scheme | Liangzhen Lai, Xu Chen, Miguel Guerrero, Simon James Hollis | 2024-06-04 |
| 11954580 | Spatial tiling of compute arrays with shared control | Ganesh Venkatesh, Vikas Chandra | 2024-04-09 |
| 11922306 | Tensor controller architecture | Ganesh Venkatesh, Simon James Hollis | 2024-03-05 |
| 11893159 | Multi-component detection of gestures | Rodney E. Hooker, Maurizio Paganini | 2024-02-06 |
| 11816480 | Neural network compute tile | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2023-11-14 |
| 11727259 | Neural network accelerator with parameters resident on chip | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2023-08-15 |
| 11709783 | Tensor data distribution using grid direct-memory access (DMA) controller | Xu Chen, Yu-Hsin Chen, Liangzhen Lai | 2023-07-25 |
| 11704562 | Architecture for virtual instructions | Miguel Guerrero, Liangzhen Lai, Simon James Hollis | 2023-07-18 |
| 11501144 | Neural network accelerator with parameters resident on chip | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2022-11-15 |
| 11467675 | Multi-component detection of gestures | Rodney E. Hooker, Maurizio Paganini | 2022-10-11 |
| 11422801 | Neural network compute tile | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2022-08-23 |
| 11379707 | Neural network instruction set architecture | Ravi Narayanaswami, Dong Hyuk Woo, Olivier Temam | 2022-07-05 |
| 11176493 | Virtualizing external memory as local to a machine learning accelerator | Lawrence J. Madar, III, Temitayo Fadelu, Ravi Narayanaswami | 2021-11-16 |
| 11099772 | Hardware double buffering using a special purpose computational unit | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2021-08-24 |
| 10885434 | Alternative loop limits for accessing data in multi-dimensional tensors | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2021-01-05 |
| 10802956 | Accessing prologue and epilogue data | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2020-10-13 |
| 10534607 | Accessing data in multi-dimensional tensors using adders | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2020-01-14 |
| 10504022 | Neural network accelerator with parameters resident on chip | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2019-12-10 |
| 10496326 | Hardware double buffering using a special purpose computational unit | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2019-12-03 |
| 10248908 | Alternative loop limits for accessing data in multi-dimensional tensors | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2019-04-02 |
| 10175912 | Hardware double buffering using a special purpose computational unit | Olivier Temam, Ravi Narayanaswami, Dong Hyuk Woo | 2019-01-08 |