DW

David T. Wang

Google: 51 patents #174 of 22,993Top 1%
IN Inphi: 23 patents #13 of 228Top 6%
RA Rambus: 11 patents #144 of 549Top 30%
ME Metaram: 7 patents #2 of 5Top 40%
IBM: 5 patents #18,733 of 70,183Top 30%
AM AMD: 3 patents #3,141 of 9,279Top 35%
HO Hospira: 3 patents #54 of 195Top 30%
WT Western Digital Technologies: 2 patents #1,787 of 3,180Top 60%
VT Via Technologies: 1 patents #566 of 1,108Top 55%
CL Cirrus Logic: 1 patents #703 of 1,131Top 65%
BE Bal Seal Engineering: 1 patents #40 of 65Top 65%
📍 Westlake Village, CA: #3 of 587 inventorsTop 1%
🗺 California: #1,696 of 386,348 inventorsTop 1%
Overall (All Time): #10,778 of 4,157,543Top 1%
115
Patents All Time

Issued Patents All Time

Showing 76–100 of 115 patents

Patent #TitleCo-InventorsDate
8209479 Memory circuit system and method Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2012-06-26
8181048 Performing power management operations Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2012-05-15
8169233 Programming of DIMM termination resistance values Philip Ferolito, Daniel L. Rosenband, Michael J. Smith 2012-05-01
8154935 Delaying a signal communicated from a system to at least one of a plurality of memory circuits Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2012-04-10
8122207 Apparatus and method for power management of memory circuits by a system or component thereof Suresh Rajan, Michael J. Smith 2012-02-21
8112266 Apparatus for simulating an aspect of a memory circuit Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2012-02-07
8090897 System and method for simulating an aspect of a memory circuit Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2012-01-03
8089795 Memory module with memory stack and interface with enhanced capabilities Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2012-01-03
8080874 Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween Jeremy Werner, Daniel L. Rosenband, Jeremy Matthew Plunkett, William L. Schmidt, Wael Zohni +4 more 2011-12-20
8077535 Memory refresh apparatus and method Keith R. Schakel, Suresh Rajan, Michael J. Smith, Frederick Daniel Weber 2011-12-13
8041881 Memory device with emulated characteristics Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2011-10-18
8019589 Memory apparatus operable to perform a power-saving operation Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2011-09-13
7981082 System and method for reducing air bubbles in a fluid delivery line Robert Cousineau, Lori Lucke, Marwan A. Fathallah, John S. Ziegler 2011-07-19
7905710 System and method for improved low flow medical pump delivery Peter J. Scaramuzzi, Mansour Saleki, Robert Cousineau, Kent Abrahamson, Michael W. Lawless +7 more 2011-03-15
7761724 Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2010-07-20
7730338 Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2010-06-01
7724589 System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2010-05-25
7609567 System and method for simulating an aspect of a memory circuit Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2009-10-27
7590796 System and method for power management in memory systems Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2009-09-15
7580312 Power saving system and method for use with a plurality of memory circuits Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2009-08-25
7581127 Interface circuit system and method for performing power saving operations during a command-related latency Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2009-08-25
7558431 Method and system for discrete cosine transforms/inverse discrete cosine transforms based on pipeline architecture Ting-Kun Yeh, Roy Wang, Roger Lin 2009-07-07
7472220 Interface circuit system and method for performing power management operations utilizing power management signals Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2008-12-30
7392338 Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2008-06-24
7386656 Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber 2008-06-10