Issued Patents All Time
Showing 51–75 of 115 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8762675 | Memory system for synchronous data transmission | Suresh Rajan | 2014-06-24 |
| 8745321 | Simulating a memory standard | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2014-06-03 |
| 8710862 | Programming of DIMM termination resistance values | Philip Ferolito, Daniel L. Rosenband, Michael J. Smith | 2014-04-29 |
| 8711647 | DRAM refresh method and system | — | 2014-04-29 |
| 8694857 | Systems and methods for error detection and correction in a memory module which includes a memory buffer | Christopher Haywood | 2014-04-08 |
| 8687451 | Power management in semiconductor memory system | — | 2014-04-01 |
| 8671244 | Simulating a memory standard | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2014-03-11 |
| 8667312 | Performing power management operations | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2014-03-04 |
| 8631193 | Emulation of abstracted DIMMS using abstracted DRAMS | Michael J. Smith, Suresh Rajan | 2014-01-14 |
| 8631220 | Adjusting the timing of signals associated with a memory system | Michael J. Smith, Daniel L. Rosenband, Suresh Rajan | 2014-01-14 |
| 8619452 | Methods and apparatus of stacking DRAMs | Suresh Rajan, Michael J. Smith | 2013-12-31 |
| 8601204 | Simulating a refresh operation latency | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2013-12-03 |
| 8595419 | Memory apparatus operable to perform a power-saving operation | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2013-11-26 |
| 8566516 | Refresh management of memory modules | Keith R. Schakel, Suresh Rajan, Michael J. Smith | 2013-10-22 |
| 8566556 | Memory module with memory stack and interface with enhanced capabilities | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2013-10-22 |
| 8438328 | Emulation of abstracted DIMMs using abstracted DRAMs | Michael J. Smith, Suresh Rajan | 2013-05-07 |
| 8407412 | Power management of memory circuits by virtual memory simulation | Suresh Rajan, Michael J. Smith | 2013-03-26 |
| 8386722 | Stacked DIMM memory interface | Suresh Rajan | 2013-02-26 |
| 8361021 | System for reducing air bubbles in a fluid delivery line | Robert Cousineau, Lori Lucke, Marwan A. Fathallah, John S. Ziegler | 2013-01-29 |
| 8359187 | Simulating a different number of memory circuit devices | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2013-01-22 |
| 8340953 | Memory circuit simulation with power saving capabilities | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2012-12-25 |
| 8335894 | Configurable memory system with interface circuit | Suresh Rajan | 2012-12-18 |
| 8327104 | Adjusting the timing of signals associated with a memory system | Michael J. Smith, Daniel L. Rosenband, Suresh Rajan | 2012-12-04 |
| 8280714 | Memory circuit simulation system and method with refresh capabilities | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2012-10-02 |
| 8244971 | Memory circuit system and method | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2012-08-14 |