Issued Patents All Time
Showing 26–50 of 115 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9240248 | Method of using non-volatile memories for on-DIMM memory address list storage | Hamid Rategh, Lawrence Tse | 2016-01-19 |
| 9239355 | Memory test sequencer | Andrew J. Burstein, Larry Kan, Chien-Hsin Lee, Srinivas Satish Babu Bamdhamravuri | 2016-01-19 |
| 9230635 | Memory parametric improvements | Andrew J. Burstein | 2016-01-05 |
| 9171585 | Configurable memory circuit system and method | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2015-10-27 |
| 9170878 | Memory buffer with data scrambling and error correction | Christopher Haywood | 2015-10-27 |
| 9142279 | DRAM refresh method and system | — | 2015-09-22 |
| 9123441 | Backward compatible dynamic random access memory device and method of testing therefor | — | 2015-09-01 |
| 9069717 | Memory parametric improvements | Andrew J. Burstein | 2015-06-30 |
| 9047976 | Combined signal delay and power saving for use with a plurality of memory circuits | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2015-06-02 |
| 9015558 | Systems and methods for error detection and correction in a memory module which includes a memory buffer | Christopher Haywood | 2015-04-21 |
| 9001567 | Replacement of a faulty memory cell with a spare cell for a memory circuit | — | 2015-04-07 |
| 8996960 | Vertical error correction code for DRAM memory | Nirmal Saxena, Hamid Rategh, Lawrence Tse | 2015-03-31 |
| 8972673 | Power management of memory circuits by virtual memory simulation | Suresh Rajan, Michael J. Smith | 2015-03-03 |
| 8971094 | Replacement of a faulty memory cell with a spare cell for a memory circuit | — | 2015-03-03 |
| 8966327 | Protocol checking logic circuit for memory system reliability | — | 2015-02-24 |
| 8949519 | Simulating a memory circuit | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2015-02-03 |
| 8902638 | Replacement of a faulty memory cell with a spare cell for a memory circuit | — | 2014-12-02 |
| 8879348 | Power management in semiconductor memory system | — | 2014-11-04 |
| 8868829 | Memory circuit system and method | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2014-10-21 |
| 8861277 | Method of using non-volatile memories for on-DIMM memory address list storage | Hamid Rategh, Lawrence Tse | 2014-10-14 |
| 8854908 | System and method for memory access in server communications | Andrew J. Burstein | 2014-10-07 |
| 8819356 | Configurable multirank memory system with interface circuit | Suresh Rajan | 2014-08-26 |
| 8811065 | Performing error detection on DRAMs | Suresh Rajan, Michael J. Smith | 2014-08-19 |
| 8797779 | Memory module with memory stack and interface with enhanced capabilites | Suresh Rajan, Keith R. Schakel, Michael J. Smith, Frederick Daniel Weber | 2014-08-05 |
| 8773937 | Memory refresh apparatus and method | Keith R. Schakel, Suresh Rajan, Michael J. Smith, Frederick Daniel Weber | 2014-07-08 |