AM

Albert Meixner

Google: 66 patents #96 of 22,993Top 1%
NV NVIDIA: 5 patents #1,388 of 7,811Top 20%
NU Nuro: 2 patents #27 of 128Top 25%
📍 Mountain View, CA: #110 of 11,022 inventorsTop 1%
🗺 California: #4,078 of 386,348 inventorsTop 2%
Overall (All Time): #27,106 of 4,157,543Top 1%
73
Patents All Time

Issued Patents All Time

Showing 51–73 of 73 patents

Patent #TitleCo-InventorsDate
10291813 Sheet generator for image processor Jason Redgrave, Ofer Shacham, Qiuling Zhu, Daniel Frederic Finchelstein 2019-05-14
10284744 Sheet generator for image processor Jason Redgrave, Ofer Shacham, Qiuling Zhu, Daniel Frederic Finchelstein 2019-05-07
10275253 Energy efficient processor core architecture for image processor Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein, Qiuling Zhu 2019-04-30
10277833 Virtual linebuffers for image signal processors Qiuling Zhu, Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein 2019-04-30
10216487 Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure Ofer Shacham, David Patterson, Daniel Frederic Finchelstein, Qiuling Zhu, Jason Redgrave 2019-02-26
10204396 Compiler managed memory for image processor Hyunchul Park, Qiuling Zhu, Jason Redgrave 2019-02-12
10185560 Multi-functional execution lane for image processor Artem Vasilyev, Jason Redgrave, Ofer Shacham 2019-01-22
10095492 Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure 2018-10-09
10095479 Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure Ofer Shacham, David Patterson, Daniel Frederic Finchelstein, Qiuling Zhu, Jason Redgrave 2018-10-09
9986187 Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave, Ofer Shacham 2018-05-29
9978116 Core processes for block operations on an image processor having a two-dimensional execution lane array and a two-dimensional shift register Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave, Ofer Shacham 2018-05-22
9965824 Architecture for high performance, power efficient, programmable image processing Qiuling Zhu, Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more 2018-05-08
9830150 Multi-functional execution lane for image processor Artem Vasilyev, Jason Redgrave, Ofer Shacham 2017-11-28
9785423 Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure 2017-10-10
9772852 Energy efficient processor core architecture for image processor Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein, Qiuling Zhu 2017-09-26
9769356 Two dimensional shift array for image processor Ofer Shacham, Jason Redgrave, Qiuling Zhu, Daniel Frederic Finchelstein, David Patterson +1 more 2017-09-19
9756268 Line buffer unit for image processor Neeti Desai, Qiuling Zhu, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein 2017-09-05
9749548 Virtual linebuffers for image signal processors Qiuling Zhu, Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein 2017-08-29
9355483 Variable fragment shading with surface recasting Eric B. Lum, Rouslan Dimitrov, Ignacio Llamas Ubieto, Patrick Neill, Yury Uralsky 2016-05-31
9286114 System and method for launching data parallel and task parallel application threads and graphics processing unit incorporating the same 2016-03-15
9224227 Tile shader for screen space, a method of rendering and a graphics processing unit employing the tile shader 2015-12-29
9123128 Graphics processing unit employing a standard processing unit and a method of constructing a graphics processing unit 2015-09-01
9019284 Input output connector for accessing graphics fixed function units in a software-defined pipeline and a method of operating a pipeline 2015-04-28