| 11190718 |
Line buffer unit for image processor |
Neeti Desai, Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2021-11-30 |
$101,916,000 |
| 11153464 |
Two dimensional shift array for image processor |
Ofer Shacham, Jason Redgrave, Albert Meixner, Daniel Frederic Finchelstein, David Patterson +1 more |
2021-10-19 |
$89,918,000 |
| 11138013 |
Energy efficient processor core architecture for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2021-10-05 |
$94,144,000 |
| 11140293 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2021-10-05 |
$94,144,000 |
| 10872393 |
Image processor with high throughput internal communication protocol |
Jason Redgrave, Albert Meixner, Ji Kim, Artem Vasilyev, Ofer Shacham |
2020-12-22 |
$79,535,000 |
| 10791284 |
Virtual linebuffers for image signal processors |
Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, Albert Meixner |
2020-09-29 |
$44,330,000 |
| 10754654 |
Energy efficient processor core architecture for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2020-08-25 |
$49,236,000 |
| 10719905 |
Architecture for high performance, power efficient, programmable image processing |
Ofer Shacham, Albert Meixner, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more |
2020-07-21 |
$49,080,000 |
| 10685423 |
Determination of per line buffer unit memory allocation |
Hyunchul Park, Albert Meixner, William R. Mark |
2020-06-16 |
$44,816,000 |
| 10685422 |
Compiler managed memory for image processor |
Albert Meixner, Hyunchul Park, Jason Redgrave |
2020-06-16 |
$44,816,000 |
| 10638073 |
Line buffer unit for image processor |
Neeti Desai, Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2020-04-28 |
$47,987,000 |
| 10560598 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2020-02-11 |
$46,482,000 |
| 10516833 |
Virtual linebuffers for image signal processors |
Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, Albert Meixner |
2019-12-24 |
$43,360,000 |
| 10430919 |
Determination of per line buffer unit memory allocation |
Hyunchul Park, Albert Meixner, William R. Mark |
2019-10-01 |
$34,021,000 |
| 10417732 |
Architecture for high performance, power efficient, programmable image processing |
Ofer Shacham, Albert Meixner, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more |
2019-09-17 |
$38,215,000 |
| 10397450 |
Two dimensional shift array for image processor |
Ofer Shacham, Jason Redgrave, Albert Meixner, Daniel Frederic Finchelstein, David Patterson +1 more |
2019-08-27 |
$35,211,000 |
| 10321077 |
Line buffer unit for image processor |
Neeti Desai, Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-06-11 |
$24,243,000 |
| 10304156 |
Compiler managed memory for image processor |
Albert Meixner, Hyunchul Park, Jason Redgrave |
2019-05-28 |
$25,865,000 |
| 10291813 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-05-14 |
$32,951,000 |
| 10284744 |
Sheet generator for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-05-07 |
$29,188,000 |
| 10277833 |
Virtual linebuffers for image signal processors |
Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, Albert Meixner |
2019-04-30 |
$20,188,000 |
| 10275253 |
Energy efficient processor core architecture for image processor |
Albert Meixner, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein |
2019-04-30 |
$20,188,000 |
| 10216487 |
Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure |
Albert Meixner, Ofer Shacham, David Patterson, Daniel Frederic Finchelstein, Jason Redgrave |
2019-02-26 |
$26,318,000 |
| 10204396 |
Compiler managed memory for image processor |
Albert Meixner, Hyunchul Park, Jason Redgrave |
2019-02-12 |
$38,298,000 |
| 10095479 |
Virtual image processor instruction set architecture (ISA) and memory model and exemplary target hardware having a two-dimensional shift array structure |
Albert Meixner, Ofer Shacham, David Patterson, Daniel Frederic Finchelstein, Jason Redgrave |
2018-10-09 |
$29,422,000 |
