AM

Albert Meixner

Google: 66 patents #96 of 22,993Top 1%
NV NVIDIA: 5 patents #1,388 of 7,811Top 20%
NU Nuro: 2 patents #27 of 128Top 25%
📍 Mountain View, CA: #110 of 11,022 inventorsTop 1%
🗺 California: #4,078 of 386,348 inventorsTop 2%
Overall (All Time): #27,106 of 4,157,543Top 1%
73
Patents All Time

Issued Patents All Time

Showing 26–50 of 73 patents

Patent #TitleCo-InventorsDate
10719905 Architecture for high performance, power efficient, programmable image processing Qiuling Zhu, Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more 2020-07-21
10719295 Circuit to perform dual input value absolute value and sum operation Artem Vasilyev, Jason Redgrave 2020-07-21
10685423 Determination of per line buffer unit memory allocation Hyunchul Park, Qiuling Zhu, William R. Mark 2020-06-16
10685422 Compiler managed memory for image processor Hyunchul Park, Qiuling Zhu, Jason Redgrave 2020-06-16
10638073 Line buffer unit for image processor Neeti Desai, Qiuling Zhu, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein 2020-04-28
10599407 Compiler for translating between a virtual image processor instruction set architecture (ISA) and target hardware having a two-dimensional shift array structure 2020-03-24
10560598 Sheet generator for image processor Jason Redgrave, Ofer Shacham, Qiuling Zhu, Daniel Frederic Finchelstein 2020-02-11
10552939 Image processor complex transfer functions 2020-02-04
10546211 Convolutional neural network on programmable two dimensional image processor Ofer Shacham, David Patterson, William R. Mark, Daniel Frederic Finchelstein, Jason Redgrave 2020-01-28
10531030 Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave, Ofer Shacham 2020-01-07
10516833 Virtual linebuffers for image signal processors Qiuling Zhu, Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein 2019-12-24
10504480 Macro I/O unit for image processor Neeti Desai, Dilan Manatunga, Jason Redgrave, William R. Mark 2019-12-10
10489878 Configurable and programmable image processor unit Fabrizio Basso, Edward Chang, Daniel Frederic Finchelstein, Timothy O. Knight, William R. Mark +6 more 2019-11-26
10489199 Program code transformations to improve image processor runtime efficiency Hyunchul Park 2019-11-26
10481870 Circuit to perform dual input value absolute value and sum operation Artem Vasilyev, Jason Redgrave 2019-11-19
10467056 Configuration of application software on multi-core image processor Hyunchul Park 2019-11-05
10430919 Determination of per line buffer unit memory allocation Hyunchul Park, Qiuling Zhu, William R. Mark 2019-10-01
10417732 Architecture for high performance, power efficient, programmable image processing Qiuling Zhu, Ofer Shacham, Jason Redgrave, Daniel Frederic Finchelstein, David Patterson +4 more 2019-09-17
10397450 Two dimensional shift array for image processor Ofer Shacham, Jason Redgrave, Qiuling Zhu, Daniel Frederic Finchelstein, David Patterson +1 more 2019-08-27
10387989 Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform Hyunchul Park, William R. Mark, Daniel Frederic Finchelstein, Ofer Shacham 2019-08-20
10387988 Compiler techniques for mapping program code to a high performance, power efficient, programmable image processing hardware platform Hyunchul Park, William R. Mark, Daniel Frederic Finchelstein, Ofer Shacham 2019-08-20
10380969 Macro I/O unit for image processor Neeti Desai, Dilan Manatunga, Jason Redgrave, William R. Mark 2019-08-13
10334194 Block operations for an image processor having a two-dimensional execution lane array and a two-dimensional shift register Daniel Frederic Finchelstein, David Patterson, William R. Mark, Jason Redgrave, Ofer Shacham 2019-06-25
10321077 Line buffer unit for image processor Neeti Desai, Qiuling Zhu, Jason Redgrave, Ofer Shacham, Daniel Frederic Finchelstein 2019-06-11
10304156 Compiler managed memory for image processor Hyunchul Park, Qiuling Zhu, Jason Redgrave 2019-05-28