Issued Patents All Time
Showing 126–144 of 144 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7049201 | Method and apparatus for a heterojunction bipolar transistor using self-aligned epitaxy | Shao-fu Sanford Chu, Lap Chan, Jian Xun Li, Jia Zhen Zheng | 2006-05-23 |
| 7022578 | Heterojunction bipolar transistor using reverse emitter window | Shao-fu Sanford Chu, Lap Chan, Jian Xun Li, Zhen Jia Zheng | 2006-04-04 |
| 6972237 | Lateral heterojunction bipolar transistor and method of manufacture using selective epitaxial growth | Shao-fu Sanford Chu, Lap Chan, Jia Zhen Zheng, Jian Xun Li | 2005-12-06 |
| 6936519 | Double polysilicon bipolar transistor and method of manufacture therefor | Shao-fu Sanford Chu | 2005-08-30 |
| 6933188 | Use of a selective hard mask for the integration of double diffused drain MOS devices in deep sub-micron fabrication technologies | Sanford Chu, Hwee Ngoh Chua | 2005-08-23 |
| 6924202 | Heterojunction bipolar transistor with self-aligned emitter and sidewall base contact | Jian Xun Li, Lap Chan, Jia Zhen Zheng, Shao-fu Sanford Chu | 2005-08-02 |
| 6908824 | Self-aligned lateral heterojunction bipolar transistor | Jian Xun Li, Lap Chan, Jia Zhen Zheng, Shao-fu Sanford Chu | 2005-06-21 |
| 6869884 | Process to reduce substrate effects by forming channels under inductor devices and around analog blocks | Lap Chan, Sanford Chu, Chit Hwei Ng, Jia Zhen Zheng, Johnny Kok Wai Chew +1 more | 2005-03-22 |
| 6861317 | Method of making direct contact on gate by using dielectric stop layer | Sanford Chu, Lap Chan, Yelehanka Ramachandramurthy Pradeep, Kai Shao, Jia Zhen Zheng | 2005-03-01 |
| 6852605 | Method of forming an inductor with continuous metal deposition | Chit Hwei Ng, Lap Chan, Yelehanka Ramachandramurthy Pradeep, Sanford Chu | 2005-02-08 |
| 6835631 | Method to enhance inductor Q factor by forming air gaps below inductors | Zheng Zhen, Sanford Chu, Ng Chit Hwei, Lap Chan | 2004-12-28 |
| 6821904 | Method of blocking nitrogen from thick gate oxide during dual gate CMP | Yelehanka Ramachandramurthy Pradeep, Sanford Chu, Chit Hwei Ng, Jia Zhen Zheng | 2004-11-23 |
| 6638844 | Method of reducing substrate coupling/noise for radio frequency CMOS (RFCMOS) components in semiconductor technology by backside trench and fill | Sanford Chu, Chit Hwei, Lap Chan | 2003-10-28 |
| 6486017 | Method of reducing substrate coupling for chip inductors by creation of dielectric islands by selective EPI deposition | Sanford Chu, Johnny Kok Wai Chew, Sia Choon Beng | 2002-11-26 |
| 6372652 | Method for forming a thin-film, electrically blowable fuse with a reproducible blowing wattage | Zia A. Shafi, Yu Shan, ZENG-MAO ZHENG, Manju Sarkar, Shao-fu Sanford Chu | 2002-04-16 |
| 6249031 | High gain lateral PNP and NPN bipolar transistor and process compatible with CMOS for making BiCMOS circuits | Joe Jin Kuek | 2001-06-19 |
| 6093613 | Method for making high gain lateral PNP and NPN bipolar transistor compatible with CMOS for making BICMOS circuits | Joe Jin Kuek | 2000-07-25 |
| 5982021 | Vertical polysilicon diode compatible with CMOS/BiCMOS integrated circuit processes | — | 1999-11-09 |
| 5716880 | Method for forming vertical polysilicon diode compatible with CMOS/BICMOS formation | — | 1998-02-10 |