Issued Patents All Time
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10749027 | Methods and apparatus related to termination regions of a semiconductor device | Joseph A. Yedinak, Richard Stokes, Jason Higgs | 2020-08-18 |
| 9496391 | Termination region of a semiconductor device | Joseph A. Yedinak, Richard Stokes, Jason Higgs | 2016-11-15 |
| 8592277 | Method of forming low resistance gate for power MOSFET applications | Sreevatsa Sreekantham, Ihsiu Ho, James Kent Naylor | 2013-11-26 |
| 8502313 | Double layer metal (DLM) power MOSFET | Rohit Dikshit, Mark L. Rinehimer, Michael D. Gruenhagen, Joseph A. Yedinak, Tracie Petersen +3 more | 2013-08-06 |
| 8450798 | Semiconductor structure with a planar Schottky contact | — | 2013-05-28 |
| 8044461 | Planar TMBS rectifier | — | 2011-10-25 |
| 7807536 | Low resistance gate for power MOSFET applications and method of manufacture | Sreevatsa Sreekantham, Ihsiu Ho, Kent Naylor | 2010-10-05 |
| 7732842 | Structure and method for forming a planar schottky contact | — | 2010-06-08 |
| 7598144 | Method for forming inter-poly dielectric in shielded gate field effect transistor | Robert Herrick, Dean E. Probst | 2009-10-06 |
| 7385248 | Shielded gate field effect transistor with improved inter-poly dielectric | Robert Herrick, Dean E. Probst | 2008-06-10 |
| 5435646 | Temperature measurement using ion implanted wafers | Warren F. McArthur | 1995-07-25 |