Issued Patents All Time
Showing 1–25 of 74 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11769708 | Packaging-level chip and chip module packaged with magnetic cover, and electronic product | Yanwen Bai | 2023-09-26 |
| 11706878 | Multilayer circuit board | Yanwen Bai, Gang Zhao, Lin Chen | 2023-07-18 |
| 11308380 | Removable non-volatile storage card | Abhilash Mathew, Yanwen Bai, Gang Zhao, Lin Chen | 2022-04-19 |
| 11276655 | Ground reference shape for high speed interconnect | Gang Zhao | 2022-03-15 |
| 11043435 | Semiconductor die with hybrid wire bond pads | Lin Chen, Gang Zhao, Wei Jiang | 2021-06-22 |
| 10128171 | Leadframe with improved half-etch layout to reduce defects caused during singulation | Huahung Kao | 2018-11-13 |
| 9768144 | Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate | Albert Wu, Roawen Chen, Chung Chyung Han, Chien-Chuan Wei, Runzi Chang +2 more | 2017-09-19 |
| 9666571 | Package-on-package structures | Huahung Kao | 2017-05-30 |
| 9666510 | Dual row quad flat no-lead semiconductor package | Chenglin Liu, Sheng C. Liao | 2017-05-30 |
| 9543236 | Pad configurations for an electronic package assembly | Sehat Sutardja, Huahung Kao | 2017-01-10 |
| 9425139 | Dual row quad flat no-lead semiconductor package | Chenglin Liu, Sheng C. Liao | 2016-08-23 |
| 9391045 | Recessed semiconductor substrates and associated techniques | Albert Wu, Roawen Chen, Chung Chyung Han, Chien-Chuan Wei, Runzi Chang +2 more | 2016-07-12 |
| 9355951 | Interconnect layouts for electronic assemblies | Huahung Kao | 2016-05-31 |
| 9331052 | Pad configurations for an electronic package assembly | Sehat Sutardja, Huahung Kao | 2016-05-03 |
| 9288909 | Ball grid array package substrate with through holes and method of forming same | Chenglin Liu | 2016-03-15 |
| 9275929 | Package assembly having a semiconductor substrate | Sehat Sutardja, Albert Wu, Chuan-Cheng Cheng, Chien-Chuan Wei | 2016-03-01 |
| 9257410 | Package assembly including a semiconductor substrate in which a first portion of a surface of the semiconductor substrate is recessed relative to a second portion of the surface of the semiconductor substrate to form a recessed region in the semiconductor substrate | Albert Wu, Roawen Chen, Chung Chyung Han, Chien-Chuan Wei, Runzi Chang +2 more | 2016-02-09 |
| 9252115 | Method for forming semiconductor layout | Thomas Ngo | 2016-02-02 |
| 9240372 | Semiconductor die having lead wires formed over a circuit in a shielded area | — | 2016-01-19 |
| 9224677 | Semiconductor package | Chenglin Liu | 2015-12-29 |
| 9209163 | Package-on-package structures | Huahung Kao | 2015-12-08 |
| 9171744 | Attaching passive components to a semiconductor package | Albert Wu | 2015-10-27 |
| 9123699 | Formation of package pins in semiconductor packaging | Chenglin Liu, Huahung Kao | 2015-09-01 |
| 9070679 | Semiconductor package with a semiconductor die embedded within substrates | Albert Wu, Scott Wu | 2015-06-30 |
| 9064860 | Method for forming one or more vias through a semiconductor substrate and forming a redistribution layer on the semiconductor substrate | Albert Wu | 2015-06-23 |