Issued Patents All Time
Showing 76–83 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7943983 | HTO offset spacers and dip off process to define junction | Huaqiang Wu, Hiro Kinoshita, Ning Cheng, Arturo Ruiz | 2011-05-17 |
| 7935596 | HTO offset and BL trench process for memory device to improve device performance | Ning Cheng, Huaqiang Wu, Hiro Kinoshita | 2011-05-03 |
| 7867899 | Wordline resistance reduction method and structure in an integrated circuit memory device | Shenqing Fang, Connie P. Wang, Eunha Kim | 2011-01-11 |
| 7785965 | Dual storage node memory devices and methods for fabricating the same | Unsoon Kim, Kyunghoon Min, Ning Cheng, Hiroyuki Kinoshita, Sugino Rinji +3 more | 2010-08-31 |
| 7782751 | Systems and methods for computing a relative path delay between multiple transmission sources | Jungwon Lee, Jiwoong Choi | 2010-08-24 |
| 7732276 | Self-aligned patterning method by using non-conformal film and etch back for flash memory and other semiconductor applications | Shenqing Fang, Calvin T. Gabriel, Fei Wang, Angela T. Hui, Alexander H. Nickel +4 more | 2010-06-08 |
| 7670959 | Memory device etch methods | Angela T. Hui | 2010-03-02 |
| 6757860 | Channel error protection implementable across network layers in a communication system | Hui-Ling Lou, Christine Podilchuk | 2004-06-29 |