Thinh Tran — 27 Patents at Cypress Semiconductor

Thinh Tran has been granted 27 US patents while listed as an inventor at Cypress Semiconductor. The first was granted in 1996 and the most recent in December 2023. Thinh Tran ranks #142,059 of 4,157,543 US inventors in our database (top 3.4%). Patent records list Thinh Tran in Palo Alto, CA, US.

Issued Patents All Time

Showing 1–25 of 27 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11854591	Magnetic memory read circuit and calibration method therefor	Ebrahim Abedifard	2023-12-26
11289142	Nonvolatile memory sensing circuit including variable current source	Ebrahim Abedifard	2022-03-29
11211107	Magnetic memory read circuit and calibration method therefor	Ebrahim Abedifard	2021-12-28
10818330	Fast programming of magnetic random access memory (MRAM)	Mourad El Baraji	2020-10-27
9666255	Access methods and circuits for memory devices having multiple banks	Joseph Tzou, Jun Li	2017-05-30	$11,481,000
9455027	Power management system for high traffic integrated circuit	Derwin W. Mattos	2016-09-27	$10,838,000
8873264	Data forwarding circuits and methods for memory devices with write latency	Joseph Tzou	2014-10-28	$1,508,000
8705310	Access methods and circuits for memory devices having multiple banks	Joseph Tzou, Jun Li	2014-04-22	$3,629,000
8675434	High speed time interleaved sense amplifier circuits, methods and memory devices incorporating the same	Morgan Whately	2014-03-18	$2,564,000
8527802	Memory device data latency circuits and methods	Joseph Tzou	2013-09-03	$1,816,000
8464145	Serial interface devices, systems and methods	Edward L. Grivna, Gabriel Li	2013-06-11	$3,278,000
8358557	Memory device and method	Joseph Tzou, Jun Li	2013-01-22	$4,202,000
8149643	Memory device and method	Joseph Tzou, Jun Li	2012-04-03	$8,994,000
8095747	Memory system and method	Bruce Barbara, Gabriel Li, Joseph Tzou	2012-01-10	$1,826,000
8040164	Circuits and methods for programming integrated circuit input and output impedances	Suresh Parameswaran, Joseph Tzou, Morgan Whately	2011-10-18	$3,107,000
7728619	Circuit and method for cascading programmable impedance matching in a multi-chip system	Joseph Tzou, Suresh Parameswaran	2010-06-01	$1,959,000
7719908	Memory having read disturb test mode	Joseph Tzou, Suresh Parameswaran	2010-05-18	$5,029,000
7684257	Area efficient and fast static random access memory circuit and method	Christopher Joseph Lee, Joseph Tzou, Morgan Whately	2010-03-23	$5,342,000
7535772	Configurable data path architecture and clocking scheme	Suresh Parameswaran	2009-05-19	$15,500,000
7403446	Single late-write for standard synchronous SRAMs	Suresh Parameswaran, Joseph Tzou	2008-07-22	$42,084,000
7269772	Method and apparatus for built-in self-test (BIST) of integrated circuit device	Jun Li, Joseph Tzou	2007-09-11	$9,305,000
7196925	Memory array with current limiting device for preventing particle induced latch-up	Joseph Tzou, Jithender Majjiga, Morgan Whately	2007-03-27	$3,598,000
7142477	Memory interface system and method for reducing cycle time of sequential read and write accesses using separate address and data buses	Joseph Tzou, Suresh Parameswaran	2006-11-28	$4,463,000
6167321	Interface module with protection circuit and method of protecting an interface	Ting Li Chan	2000-12-26	$211,073,000
5864252	Synchronous circuit with improved clock to data output access time	Tsu-Wei F. Lee	1999-01-26

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Thinh Tran — 27 Patents

Issued Patents All Time

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