KR

Krishnaswamy Ramkumar

Cypress Semiconductor: 139 patents #2 of 1,852Top 1%
LS Longitude Flash Memory Solutions: 27 patents #1 of 26Top 4%
Infineon Technologies Ag: 6 patents #1,452 of 7,486Top 20%
📍 San Jose, CA: #71 of 32,062 inventorsTop 1%
🗺 California: #750 of 386,348 inventorsTop 1%
Overall (All Time): #4,613 of 4,157,543Top 1%
173
Patents All Time

Issued Patents All Time

Showing 26–50 of 173 patents

Patent #TitleCo-InventorsDate
10784356 Embedded sonos with triple gate oxide and manufacturing method of the same Igor G. Kouznetsov, Venkatraman Prabhakar, Ali Keshavarzi 2020-09-22
10700083 Method of ONO integration into logic CMOS flow Bo Jin, Fredrick B. Jenne 2020-06-30
10699901 SONOS ONO stack scaling Frederick B. Jenne, Sagy Levy 2020-06-30
10615289 Nonvolatile charge trap memory device having a high dielectric constant blocking region Igor Polishchuk, Sagy Levy 2020-04-07
10593812 Radical oxidation process for fabricating a nonvolatile charge trap memory device Sagy Levy, Jeong Soo Byun 2020-03-17
10446656 Memory transistor with multiple charge storing layers and a high work function gate electrode Igor Polishchuk, Sagy Levy 2019-10-15
10424592 Method of integrating a charge-trapping gate stack into a CMOS flow 2019-09-24
10418373 Method of ONO stack formation 2019-09-17
10374067 Oxide-nitride-oxide stack having multiple oxynitride layers Sagy Levy, Fredrick B. Jenne, Sam Geha 2019-08-06
10332599 Bias scheme for word programming in non-volatile memory and inhibit disturb reduction Gary Menezes, Ali Keshavarzi, Venkatraman Prabhakar 2019-06-25
10319733 Oxide formation in a plasma process Jeong Soo Byun 2019-06-11
10312336 Memory transistor with multiple charge storing layers and a high work function gate electrode Igor Polishchuk, Sagy Levy 2019-06-04
10304968 Radical oxidation process for fabricating a nonvolatile charge trap memory device Sagy Levy, Jeong Soo Byun 2019-05-28
10263087 Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region Sagy Levy, Fredrick B. Jenne 2019-04-16
10199229 SONOS stack with split nitride memory layer Fredrick B. Jenne 2019-02-05
10153294 Method of ONO stack formation 2018-12-11
10128258 Oxide formation in a plasma process Jeong Soo Byun 2018-11-13
10079314 Nonvolatile charge trap memory device having a deuterated layer in a multi-layer charge-trapping region Sagy Levy, Frederick B. Jenne 2018-09-18
10079243 Method of integrating a charge-trapping gate stack into a CMOS flow 2018-09-18
10062573 Embedded SONOS with triple gate oxide and manufacturing method of the same Igor G. Kouznetsov, Venkatraman Prabhakar, Ali Keshavarzi 2018-08-28
10020317 Memory device with multi-layer channel and charge trapping layer Renhua Zhang, Lei Xue, Rinji Sugino 2018-07-10
10002878 Complementary SONOS integration into CMOS flow Venkatraman Prabhakar, Igor G. Kouznetsov 2018-06-19
9997641 SONOS ONO stack scaling Fredrick B. Jenne, Sagy Levy 2018-06-12
9997528 Complimentary SONOS integration into CMOS flow Venkatraman Prabhakar, Igor G. Kouznetsov 2018-06-12
9929240 Memory transistor with multiple charge storing layers and a high work function gate electrode Igor Polishchuk, Sagy Levy 2018-03-27