Issued Patents All Time
Showing 26–42 of 42 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6727165 | Fabrication of metal contacts for deep-submicron technologies | Ming-Yi Lee | 2004-04-27 |
| 6613651 | Integrated circuit isolation system | Sheldon Aronowitz | 2003-09-02 |
| 6605846 | Shallow junction formation | — | 2003-08-12 |
| 6544854 | Silicon germanium CMOS channel | Gary K. Giust | 2003-04-08 |
| 6511925 | Process for forming high dielectric constant gate dielectric for integrated circuit structure | Sheldon Aronowitz, Vladimir Zubkov | 2003-01-28 |
| 6504219 | Indium field implant for punchthrough protection in semiconductor devices | Shih-Fen Huang | 2003-01-07 |
| 6486064 | Shallow junction formation | — | 2002-11-26 |
| 6472715 | Reduced soft error rate (SER) construction for integrated circuit structures | Yauh-Ching Liu, Ruggero Castagnetti, Weiran Kong, Lee Phan, Franklin Duan +1 more | 2002-10-29 |
| 6455363 | System to improve ser immunity and punchthrough | Gary K. Giust, Weiran Kong | 2002-09-24 |
| 6413881 | PROCESS FOR FORMING THIN GATE OXIDE WITH ENHANCED RELIABILITY BY NITRIDATION OF UPPER SURFACE OF GATE OF OXIDE TO FORM BARRIER OF NITROGEN ATOMS IN UPPER SURFACE REGION OF GATE OXIDE, AND RESULTING PRODUCT | Sheldon Aronowitz, John Haywood, James Kimball, Ravindra M. Kapre, Nicholas K. Eib | 2002-07-02 |
| 6358806 | Silicon carbide CMOS channel | — | 2002-03-19 |
| 6342429 | Method of fabricating an indium field implant for punchthrough protection in semiconductor devices | Shih-Fen Huang | 2002-01-29 |
| 6331468 | Formation of integrated circuit structure using one or more silicon layers for implantation and out-diffusion in formation of defect-free source/drain regions and also for subsequent formation of silicon nitride spacers | Sheldon Aronowitz, Ravindra Kapre, James Kimball | 2001-12-18 |
| 6323106 | Dual nitrogen implantation techniques for oxynitride formation in semiconductor devices | Shih-Fen Huang | 2001-11-27 |
| 6156620 | Isolation trench in semiconductor substrate with nitrogen-containing barrier region, and process for forming same | Shih-Fen Huang, Sheldon Aronowitz | 2000-12-05 |
| 6144076 | Well formation For CMOS devices integrated circuit structures | Shih-Fen Huang, Ruggero Castagnetti | 2000-11-07 |
| 6090651 | Depletion free polysilicon gate electrodes | Sheldon Aronowitz, Gary K. Giust | 2000-07-18 |