NP

Nicolas Posseme

CEA: 75 patents #3 of 7,956Top 1%
Applied Materials: 5 patents #2,165 of 7,310Top 30%
SS Stmicroelectronics Sa: 3 patents #1,857 of 4,662Top 40%
SS Stmicroelectronics (Crolles 2) Sas: 2 patents #204 of 529Top 40%
UF Université Joseph Fourier: 2 patents #26 of 284Top 10%
CN CNRS: 2 patents #1,756 of 11,908Top 15%
UA Universite Grenoble Alpes: 1 patents #96 of 431Top 25%
Overall (All Time): #23,507 of 4,157,543Top 1%
78
Patents All Time

Issued Patents All Time

Showing 26–50 of 78 patents

Patent #TitleCo-InventorsDate
11081399 Method of producing microelectronic components Cyrille Le Royer 2021-08-03
11049724 Method for producing patterns in a substrate Lamia Nouri, Frederic Gaillard, Stefan Landis 2021-06-29
10928725 Method for the directed self-assembly of a block copolymer by graphoepitaxy Raluca Tiron, Xavier Chevalier, Christophe Navarro 2021-02-23
10923352 Method for forming a functionalised guide pattern for a graphoepitaxy method Raluca Tiron, Xavier Chevalier 2021-02-16
10875236 Method for selective etching of a block copolymer Sebastien Barnola, Patricia PIMENTA BARROS, Aurélien Sarrazin 2020-12-29
10795257 Method for forming a functionalised guide pattern for a graphoepitaxy method Raluca Tiron, Xavier Chevalier 2020-10-06
10784108 Method for forming a functionalised assembly guide Guillaume CLAVEAU, Maxime Argoud, Raluca Tiron 2020-09-22
10741398 Formation of reliefs on the surface of a substrate Lamia Nouri, Stefan Landis 2020-08-11
10658197 Method for producing low-permittivity spacers Maxime Garcia-Barros, Yves Morand 2020-05-19
10573529 Method of etching a three-dimensional dielectric layer Sebastien Barnola 2020-02-25
10553435 Method for obtaining patterns in a layer Stefan Landis, Lamia Nouri 2020-02-04
10553702 Transistor with controlled overlap of access regions Perrine Batude 2020-02-04
10497627 Method of manufacturing a dopant transistor located vertically on the gate Laurent Brunet, Perrine Batude 2019-12-03
10490451 Process for fabricating a transistor structure including a plugging step Laurent Brunet 2019-11-26
10446408 Process for etching a SiN-based layer 2019-10-15
10381264 Process for producing connections to an electronic chip Yann Mazel 2019-08-13
10347545 Method for producing on the same transistors substrate having different characteristics Laurent Grenouillet, Sebastien Barnola, Marie-Anne Jaud, Jerome Mazurier 2019-07-09
10336023 Method for creating patterns Stefan Landis, Lamia Nouri 2019-07-02
10242870 Method for producing patterns Stefan Landis, Lamia Nouri 2019-03-26
10062602 Method of etching a porous dielectric material Sebastien Barnola, Olivier Joubert, Srinivas D. Nemani, Laurent Vallier 2018-08-28
10056470 Consumption of the channel of a transistor by sacrificial oxidation Christian Arvet 2018-08-21
10043890 Method of forming spacers for a gate of a transistor Olivier Pollet 2018-08-07
10026657 Method for producing on the same transistors substrate having different characteristics Laurent Grenouillet 2018-07-17
10014386 Method of manufacturing a transistor Christian Arvet 2018-07-03
9953807 Method for producing patterns by ion implantation Stefan Landis, Sebastien Barnola, Thibaut David, Lamia Nouri 2018-04-24