Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9640653 | Integrated circuit device, system, and method of fabrication | — | 2017-05-02 |
| 9153689 | Integrated circuit device, system, and method of fabrication | — | 2015-10-06 |
| 8259286 | Lithography and associated methods, devices, and systems | — | 2012-09-04 |
| 7770080 | Using neighborhood functions to extract logical models of physical failures using layout based diagnosis | Ronald DeShawn Blanton, Rao H. Desineni | 2010-08-03 |
| 6892367 | Vertex based layout pattern (VEP): a method and apparatus for describing repetitive patterns in IC mask layout | Michal Palusinski, Mariusz Niewczas, Andrezej Strojwas, Thomas Waas, Hans Eisenmann | 2005-05-10 |
| 6175244 | Current signatures for IDDQ testing | Anne Elizabeth Gattiker | 2001-01-16 |
| 5528604 | Test pattern generation for an electronic circuit using a transformed circuit description | Aiman Helmi El-Maleh, Thomas E. Marchok, Janusz Rajski | 1996-06-18 |
| 5324992 | Self-timing integrated circuits having low clock signal during inactive periods | — | 1994-06-28 |
| 5051690 | Apparatus and method for detecting vertically propagated defects in integrated circuits | Michael E. Thomas | 1991-09-24 |
| 5051951 | Static RAM memory cell using N-channel MOS transistors | Pranab Nag | 1991-09-24 |
| 5025344 | Built-in current testing of integrated circuits | Phillip J. Nigh | 1991-06-18 |
| 4835466 | Apparatus and method for detecting spot defects in integrated circuits | Michael E. Thomas | 1989-05-30 |