MP

Michal Palusinski

PS Pdf Solutions: 1 patents #76 of 143Top 55%
📍 Cupertino, CA: #5,025 of 6,989 inventorsTop 75%
🗺 California: #247,236 of 386,348 inventorsTop 65%
Overall (All Time): #3,448,497 of 4,157,543Top 85%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
6892367 Vertex based layout pattern (VEP): a method and apparatus for describing repetitive patterns in IC mask layout Mariusz Niewczas, Wojciech P. Maly, Andrezej Strojwas, Thomas Waas, Hans Eisenmann 2005-05-10