LB

Lalit Bharat

CS Cadence Design Systems: 2 patents #781 of 2,263Top 35%
📍 Noida, IN: #227 of 795 inventorsTop 30%
Overall (All Time): #1,836,100 of 4,157,543Top 45%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
11256837 Methods, systems, and computer program product for implementing an electronic design with high-capacity design closure Sourav Kumar Sircar, Marc Heyberger, Manish Garg, Akash Khandelwal, Chunlong Pan +5 more 2022-02-22
9633159 Method and system for performing distributed timing signoff and optimization Vipul Parikh, Shagufta Siddique, Prashant Sethia, Naresh Kumar 2017-04-25