VP

Vipul Parikh

Oracle: 2 patents #5,522 of 14,854Top 40%
CS Cadence Design Systems: 1 patents #1,216 of 2,263Top 55%
Fujitsu Limited: 1 patents #14,843 of 24,456Top 65%
Overall (All Time): #991,976 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9633159 Method and system for performing distributed timing signoff and optimization Lalit Bharat, Shagufta Siddique, Prashant Sethia, Naresh Kumar 2017-04-25
7293157 Logically partitioning different classes of TLB entries within a single caching structure Quinn A. Jacobson 2007-11-06
7146303 Technique for incorporating power information in register transfer logic design Aninda Roy 2006-12-05
6691082 Method and system for sub-band hybrid coding Joseph Gerard Aguilar, Juin-Hwey Chen, Xiaoqin Sun 2004-02-10
6553477 Microprocessor and address translation method for microprocessor Murali V. Krishna, Michael G. Butler, Gene W. Shen, Masahito Kubo 2003-04-22