Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8875087 | Method and system for automated script generation for EDA tools | Yinghua Li | 2014-10-28 |
| 8132135 | Method and system for creating a boolean model of multi-path and multi-strength signals for verification | Mitchell Hines, Chih-Chang Lin | 2012-03-06 |
| 7735035 | Method and system for creating a boolean model of multi-path and multi-strength signals for verification | Mitchell Hines, Chih-Chang Lin | 2010-06-08 |
| 7669165 | Method and system for equivalence checking of a low power design | Manish Pandey, Rajat Arora, Chih-Chang Lin, Huan-Chih Tsai, Bharat Chandramouli | 2010-02-23 |
| 7627842 | Method and system for verification of circuits with encoded signals | Chih-Chang Lin | 2009-12-01 |
| 7620919 | Method and system for logic equivalence checking | Manish Pandey, Yung-Te Lai, Bret Siarowski, Chih-Chang Lin | 2009-11-17 |
| 7620918 | Method and system for logic equivalence checking | Manish Pandey, Yung-Te Lai, Bret Siarowski, Chih-Chang Lin | 2009-11-17 |
| 7373618 | Method and system for selection and replacement of subcircuits in equivalence checking | Tao Feng, Debjyoti Paul, Chih-Chang Lin | 2008-05-13 |
| 7266790 | Method and system for logic equivalence checking | Manish Pandey, Yung-Te Lai, Bret Siarkowski, Chih-Chang Lin | 2007-09-04 |
| 5479363 | Programmable digital signal processor using switchable unit-delays for optimal hardware allocation | Alan N. Willson, Jr., Alan Kwentus | 1995-12-26 |