JG

Jhih-Rong Gao

CS Cadence Design Systems: 11 patents #99 of 2,263Top 5%
🗺 Texas: #13,747 of 125,132 inventorsTop 15%
Overall (All Time): #440,312 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Showing 1–11 of 11 patents

Patent #TitleCo-InventorsDate
11868695 Driver resizing using a transition-based pin capacitance increase margin Yi-Xiao Ding, Zhuo Li 2024-01-09
11675956 Pruning redundant buffering solutions using fast timing models Yi-Xiao Ding, Zhuo Li 2023-06-13
11526650 Switching power aware driver resizing by considering net activity in buffering algorithm Yi-Xiao Ding, Zhuo Li 2022-12-13
11520959 Pruning of buffering candidates for improved efficiency of evaluation Yi-Xiao Ding, Zhuo Li, Sheng-En David Lin 2022-12-06
11514222 Cell-width aware buffer insertion technique for narrow channels Sheng-En David Lin, Yi-Xiao Ding, Zhuo Li 2022-11-29
11347923 Buffering algorithm with maximum cost constraint Yi-Xiao Ding, Zhuo Li 2022-05-31
10963620 Buffer insertion technique to consider edge spacing and stack via design rules Yi-Xiao Ding, Zhuo Li 2021-03-30
10936777 Unified improvement scoring calculation for rebuffering an integrated circuit design Yi-Xiao Ding, Zhuo Li 2021-03-02
10860764 Layer assignment technique to improve timing in integrated circuit design Yi-Xiao Ding, Zhuo Li 2020-12-08
10289795 Routing tree topology generation Thomas Andrew Newton, Derong Liu, Mehmet Can Yildiz, Charles J. Alpert, Zhuo Li 2019-05-14
10031994 Systems and methods for congestion and routability aware detailed placement Wen-Hao Liu, Mehmet Can Yildiz, Charles J. Alpert, Zhuo Li 2018-07-24