Issued Patents All Time
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8627249 | Method and system for generating design constraints | Manish Pandey, Marcalo Glusman, Yee-Wing Hsieh, Andy Lai Lin | 2014-01-07 |
| 8209648 | Verifying multiple constraints for circuit designs | Shan-Chyun Ku, Marcelo Glusman, Yee-Wing Hsieh, Manish Pandey, Sarath Kirihennedige | 2012-06-26 |
| 7962886 | Method and system for generating design constraints | Manish Pandey, Marcelo Glusman, Yee-Wing Hsieh, Andy Lai Lin | 2011-06-14 |
| 6345373 | System and method for testing high speed VLSI devices using slower testers | Srimat Chakradhar, Kwang-Ting Cheng | 2002-02-05 |
| 6018813 | Identification and test generation for primitive faults | Srimat Chakradhar, Kwang-Ting Cheng | 2000-01-25 |