Issued Patents All Time
Showing 26–50 of 96 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8429579 | Translating a user design in a configurable IC for debugging the user design | Brad Hutchings, Steven Teig | 2013-04-23 |
| 8166435 | Timing operations in an IC with configurable circuits | Steven Teig | 2012-04-24 |
| 8112468 | Method and apparatus for performing an operation with a plurality of sub-operations in a configurable IC | Jason Redgrave, Steven Teig | 2012-02-07 |
| 8112733 | Method and apparatus for routing with independent goals on different layers | Jonathan Frankle | 2012-02-07 |
| 8069425 | Translating a user design in a configurable IC for debugging the user design | Brad Hutchings, Steven Teig | 2011-11-29 |
| 7971172 | IC that efficiently replicates a function to save logic and routing resources | Daniel Pugh | 2011-06-28 |
| 7962705 | System and method for providing a virtual memory architecture narrower and deeper than a physical memory architecture | Herman Schmit, Brad Hutchings, Jason Redgrave, Steven Teig | 2011-06-14 |
| 7898291 | Operational time extension | Andre Rohe, Steven Teig, Herman Schmit, Jason Redgrave | 2011-03-01 |
| 7765249 | Use of hybrid interconnect/logic circuits for multiplication | Daniel Pugh, Herman Schmit, Jason Redgrave | 2010-07-27 |
| 7694083 | System and method for providing a virtual memory architecture narrower and deeper than a physical memory architecture | Herman Schmit, Brad Hutchings, Jason Redgrave, Steven Teig | 2010-04-06 |
| 7610566 | Method and apparatus for function decomposition | Steven Teig | 2009-10-27 |
| 7609085 | Configurable integrated circuit with a 4-to-1 multiplexer | Herman Schmit, Steven Teig | 2009-10-27 |
| 7587698 | Operational time extension | Andre Rohe, Steven Teig, Herman Schmit, Jason Redgrave | 2009-09-08 |
| 7535252 | Configurable ICs that conditionally transition through configuration data sets | Steven Teig, Jason Redgrave | 2009-05-19 |
| 7530033 | Method and apparatus for decomposing functions in a configurable IC | Herman Schmit, Steven Teig | 2009-05-05 |
| 7480885 | Method and apparatus for routing with independent goals on different layers | Jonathan Frankle | 2009-01-20 |
| 7461362 | Replacing circuit design elements with their equivalents | Jason Redgrave | 2008-12-02 |
| 7372297 | Hybrid interconnect/logic circuits enabling efficient replication of a function in several sub-cycles to save logic and routing resources | Daniel Pugh | 2008-05-13 |
| 7310793 | Interconnect lines with non-rectilinear terminations | Steven Teig | 2007-12-18 |
| 7246338 | Method and apparatus for computing cost of a path expansion to a surface | Steven Teig | 2007-07-17 |
| 7236009 | Operational time extension | Andre Rohe, Steven Teig, Herman Schmit, Jason Redgrave | 2007-06-26 |
| 7155697 | Routing method and apparatus | Steven Teig, Oscar Buset, Etienne Jacques, Jonathan Frankle | 2006-12-26 |
| 7143383 | Method for layout of gridless non manhattan integrated circuits with tile based router | Steven Teig | 2006-11-28 |
| 7114141 | Method and apparatus for decomposing a design layout | Steven Teig | 2006-09-26 |
| 7107564 | Method and apparatus for routing a set of nets | Steven Teig | 2006-09-12 |