Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6963962 | Memory system for supporting multiple parallel accesses at very high frequencies | Murali Chinnakonda, Thang M. Tran | 2005-11-08 |
| 6898690 | Multi-tiered memory bank having different data buffer sizes with a programmable bank select | Michael S. Allen, Jose Fridman, Marc Hoffman | 2005-05-24 |
| 6606684 | Multi-tiered memory bank having different data buffer sizes with a programmable bank select | Michael S. Allen, Jose Fridman, Marc Hoffman | 2003-08-12 |
| 6473837 | Snoop resynchronization mechanism to preserve read ordering | William A. Hughes, Derrick R. Meyer, Stephen M. Conor | 2002-10-29 |
| 6473832 | Load/store unit having pre-cache and post-cache queues for low latency load memory operations | William Kurt Lewchuk, William A. Hughes | 2002-10-29 |
| 6446181 | System having a configurable cache/SRAM memory | David B. Witt, Michael S. Allen, Moinul Syed, Ravi Kolagotla, Lawrence A. Booth, Jr. +1 more | 2002-09-03 |
| 5838943 | Apparatus for speculatively storing and restoring data to a cache memory | Rajiv M. Hattangadi | 1998-11-17 |