Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9639356 | Arbitrary size table lookup and permutes with crossbar | Marc Hoffman, Ajay Anant Ingle | 2017-05-02 |
| 9632781 | Vector register addressing and functions based on a scalar register data value | Ajay Anant Ingle, Marc Hoffman, Lucian Codrescu | 2017-04-25 |
| 9363749 | Dynamic power scaling of digital modems | Deepak Mathew, Garret Shih, Robin L. Brown | 2016-06-07 |
| 9342479 | Systems and methods of data extraction in a vector processor | Ajay Anant Ingle, Deepak Mathew, Marc Hoffman, Michael John Lopez | 2016-05-17 |
| 8804844 | Adaptive early exit techniques in image correlation | Bradley C. Aldrich | 2014-08-12 |
| 7333530 | Despread signal recovery in digital signal processors | Rasekh Rifaat, Zvi Greenfield | 2008-02-19 |
| 7154950 | Adaptive early exit techniques in image correlation | Bradley C. Aldrich | 2006-12-26 |
| 7111155 | Digital signal processor computation core with input operand selection from operand bus for dual operations | William C. Anderson, John H. Edmondson, Marc Hoffman, Russell L. Rivin | 2006-09-19 |
| 7107302 | Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units | Marc Hoffman | 2006-09-12 |
| 7062523 | Method for efficiently computing a fast fourier transform | Marc Hoffman | 2006-06-13 |
| 7047271 | DSP execution unit for efficient alternate modes for processing multiple data sizes | Bradley C. Aldrich, Paul Gilbert Meyer, Gang Liang | 2006-05-16 |
| 7043582 | Self-nesting interrupts | Ravi P. Singh, Thomas Tomazin, Charles P. Roth, Michael S. Allen | 2006-05-09 |
| 7031498 | Adaptive early exit techniques in image correlation | Bradley C. Aldrich | 2006-04-18 |
| 6978350 | Methods and apparatus for improving throughput of cache-based embedded processors | Palle Birk, Joern Soerensen, Michael S. Allen | 2005-12-20 |
| 6948056 | Maintaining even and odd array pointers to extreme values by searching and comparing multiple elements concurrently where a pointer is adjusted after processing to account for a number of pipeline stages | Charles P. Roth, Ravi Kolagotla | 2005-09-20 |
| 6898690 | Multi-tiered memory bank having different data buffer sizes with a programmable bank select | Hebbalalu S. Ramagopal, Michael S. Allen, Marc Hoffman | 2005-05-24 |
| 6859872 | Digital signal processor computation core with pipeline having memory access stages and multiply accumulate stages positioned for efficient operation | William C. Anderson, John H. Edmondson, Marc Hoffman | 2005-02-22 |
| 6820189 | Computation core executing multiple operation DSP instructions and micro-controller instructions of shorter length without performing switch operation | Marc Hoffman, John H. Edmondson | 2004-11-16 |
| 6760800 | Event vector table override | Charles P. Roth, Ravi Kolagotla | 2004-07-06 |
| 6725360 | Selectively processing different size data in multiplier and ALU paths in parallel | Bradley C. Aldrich, Paul Gilbert Meyer, Gang Liang | 2004-04-20 |
| 6700996 | Adaptive early exit techniques in image correlation | Bradley C. Aldrich | 2004-03-02 |
| 6654502 | Adaptive early exit techniques in image correlation | Bradley C. Aldrich | 2003-11-25 |
| 6606684 | Multi-tiered memory bank having different data buffer sizes with a programmable bank select | Hebbalalu S. Ramagopal, Michael S. Allen, Marc Hoffman | 2003-08-12 |
| 6332188 | Digital signal processor with bit FIFO | Douglas Garde, Alexei Zatsman, Aryeh Lezerovitz, Zvi Greenfield, David R. Levine | 2001-12-18 |