Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MH

Marc Hoffman — 32 Patents

Qualcomm: 11 patents #1,893 of 12,104Top 20%
ADAnalog Devices: 11 patents #142 of 1,990Top 8%
VOVacon Oy: 3 patents #4 of 42Top 10%
Intel: 3 patents #10,444 of 30,777Top 35%
NONordx/Cdt: 1 patents #6 of 21Top 30%
Clayton, NC: #2 of 211 inventorsTop 1%
North Carolina: #1,193 of 45,564 inventorsTop 3%
Overall (All Time): #110,428 of 4,157,543Top 3%
32 Patents All Time
Marc Hoffman has been granted 32 US patents while listed as an inventor at Analog Devices. The first was granted in 1994 and the most recent in December 2025. Marc Hoffman ranks #110,428 of 4,157,543 US inventors in our database (top 2.7%). Patent records list Marc Hoffman in Clayton, NC, US.

Issued Patents All Time

Showing 1–25 of 32 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12513434 Read-out integrated circuit (ROIC) interface system for digitization and control (RIS-DC) Mohammad Vakil, Dennis Daniels, David L. Walker 2025-12-30
12436761 Instruction applicable to radix-3 butterfly computation Sanjeev Lahoti, Srijesh Sudarsanan, Hongfang Dong 2025-10-07
12159140 Instruction set architecture for neural network quantization and packing Srijesh Sudarsanan, Deepak Mathew, Sundar Balasubramanian, Mansi Jain, James G. Lee +1 more 2024-12-03 $29,038,000
11900111 Permutation instruction Srijesh Sudarsanan, Deepak Mathew, Gerald T. Sweeney, Sundar Balasubramanian, Hongfeng Dong +2 more 2024-02-13 $17,908,000
10466967 System and method for piecewise linear approximation Deepak Mathew, Ajay Anant Ingle, Yurong Sun, Jianming Zhu 2019-11-05 $20,667,000
9723741 Housing arrangement of a power electronics device Devin Dilley, Dan Isaksson 2017-08-01
9639503 Vector indirect element vertical addressing mode with horizontal permute Ajay Anant Ingle, David Hoyle 2017-05-02 $7,360,000
9639356 Arbitrary size table lookup and permutes with crossbar Ajay Anant Ingle, Jose Fridman 2017-05-02 $7,360,000
9632781 Vector register addressing and functions based on a scalar register data value Ajay Anant Ingle, Jose Fridman, Lucian Codrescu 2017-04-25 $8,459,000
D783529 Frequency converter Dan Lewis 2017-04-11
D773993 Frequency converter Dan Lewis 2016-12-13
9342479 Systems and methods of data extraction in a vector processor Jose Fridman, Ajay Anant Ingle, Deepak Mathew, Michael John Lopez 2016-05-17 $8,465,000
9268571 Selective coupling of an address line to an element bank of a vector register file Ajay Anant Ingle, Deepak Mathew 2016-02-23 $9,167,000
9130786 Device and method for computing a channel estimate Deepak Mathew, Ajay Anant Ingle, Mao Zeng 2015-09-08 $3,847,000
8787422 Dual fixed geometry fast fourier transform (FFT) Ajay Anant Ingle, Mao Zeng 2014-07-22 $5,870,000
8509567 Half pixel interpolator for video motion estimation accelerator Mark A. Cox, Vladimir Botchev, Ke Ning, Wei Zhang 2013-08-13 $5,311,000
8406303 Motion estimation using prediction guided decimated search Wei Zhang, Raka Singh, Ke Ning 2013-03-26 $15,507,000
7430723 System and method for implementing a three-dimensional graphic user interface Holger Nolte, Camilla Horst, Werner Posch 2008-09-30
7111155 Digital signal processor computation core with input operand selection from operand bus for dual operations William C. Anderson, John H. Edmondson, Jose Fridman, Russell L. Rivin 2006-09-19 $13,510,000
7107302 Finite impulse response filter algorithm for implementation on digital signal processor having dual execution units Jose Fridman 2006-09-12 $11,906,000
7062523 Method for efficiently computing a fast fourier transform Jose Fridman 2006-06-13 $64,809,000
6986026 Single-step processing and selecting debugging modes Charles P. Roth, Ravi P. Singh, Tien Dingh, Ravi Kolagotla, Russell L. Rivin 2006-01-10
6975909 Electronic product/service manual Eva Kluge, Werner Posch 2005-12-13
6898690 Multi-tiered memory bank having different data buffer sizes with a programmable bank select Hebbalalu S. Ramagopal, Michael S. Allen, Jose Fridman 2005-05-24
6859872 Digital signal processor computation core with pipeline having memory access stages and multiply accumulate stages positioned for efficient operation William C. Anderson, John H. Edmondson, Jose Fridman 2005-02-22 $32,076,000