Issued Patents All Time
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12401364 | Multiple partitions in a data processing array | Juan J. Noguera Serra, Tim Tuan, Javier Cabezas Rodriguez, David Clarke, Peter McColgan +3 more | 2025-08-26 |
| 12164451 | Data processing array interface having interface tiles with multiple direct memory access circuits | David Clarke, Peter McColgan, Juan J. Noguera Serra, Tim Tuan, Saurabh Mathur +3 more | 2024-12-10 |
| 11848670 | Multiple partitions in a data processing array | Juan J. Noguera Serra, Tim Tuan, Javier Cabezas Rodriguez, David Clarke, Peter McColgan +3 more | 2023-12-19 |
| 11669464 | Multi-addressing mode for DMA and non-sequential read and write patterns | Goran H K Bilski, Baris Ozgul, David Clarke, Juan J. Noguera Serra, Jan Langer +2 more | 2023-06-06 |
| 11520717 | Memory tiles in data processing engine array | David Clarke, Peter McColgan, Jose Marques, Juan J. Noguera Serra, Tim Tuan +2 more | 2022-12-06 |
| 10635622 | System-on-chip interface architecture | Goran H K Bilski, Juan J. Noguera Serra, David Clarke, Tim Tuan, Peter McColgan +2 more | 2020-04-28 |