Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11581881 | Clock and phase alignment between physical layers and controller | Sarosh I. Azad, Benson Chau | 2023-02-14 |
| 11281618 | Methods and circuits for deadlock avoidance | Sagheer Ahmad | 2022-03-22 |
| 10861578 | Distributed memory repair network | Roger D. Flateau, Jr. | 2020-12-08 |
| 10169177 | Non-destructive online testing for safety critical applications | Banadappa Shivaray, Pranjal Chauhan, Pramod Surathkal, Alex S. Warshofsky, Soumitra Kumar Bhowmick +1 more | 2019-01-01 |
| 10042692 | Circuit arrangement with transaction timeout detection | Sarosh I. Azad, Bhaarath Kumar | 2018-08-07 |
| 9495239 | User-configurable error handling | Sagheer Ahmad, Bradley L. Taylor, Ahmad R. Ansari | 2016-11-15 |
| 9465766 | Isolation interface for master-slave communication protocols | Sarosh I. Azad, Bhaarath Kumar | 2016-10-11 |
| 9348750 | Circuit for and method of realigning data at a receiver | — | 2016-05-24 |
| 7970977 | Deadlock-resistant bus bridge with pipeline-restricted address ranges | Kam-Wing Li, Ahmad R. Ansari, Sanford L. Helton, Khang K. Dao, Jeffrey H. Seltzer | 2011-06-28 |
| 7539923 | Circuit and method of transmitting a block of data | — | 2009-05-26 |