Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12387812 | Protecting memory controls and address | David Tran, Federico VENINI | 2025-08-12 |
| 12373360 | Integrated circuit transaction redundancy | Krishnan Srinivasan, Ygal Arbel, Sagheer Ahmad, Pramod BHARDWAJ, Yanran Chen +1 more | 2025-07-29 |
| 12105658 | Intra-chip and inter-chip data protection | Pramod BHARDWAJ, Wern-Yan Koe, Amitava Majumdar | 2024-10-01 |
| 11947409 | Parity protection of control registers based on register bit positions | Aditi R. Ganesan | 2024-04-02 |
| 11581881 | Clock and phase alignment between physical layers and controller | Benson Chau, Tomai Knopp | 2023-02-14 |
| 11429481 | Restoring memory data integrity | Wern-Yan Koe, Amitava Majumdar | 2022-08-30 |
| 11169892 | Detecting and reporting random reset faults for functional safety and other high reliability applications | Akshay SHETTY, Alex S. Warshofsky | 2021-11-09 |
| 10657067 | Memory management unit with prefetch | Bhaarath Kumar | 2020-05-19 |
| 10402332 | Memory pre-fetch for virtual memory | Bhaarath Kumar | 2019-09-03 |
| 10042692 | Circuit arrangement with transaction timeout detection | Bhaarath Kumar, Tomai Knopp | 2018-08-07 |
| 9965417 | Use of interrupt memory for communication via PCIe communication fabric | Sunita Jain | 2018-05-08 |
| 9720868 | Bridging inter-bus communications | Ygal Arbel, Sagheer Ahmad | 2017-08-01 |
| 9465766 | Isolation interface for master-slave communication protocols | Tomai Knopp, Bhaarath Kumar | 2016-10-11 |
| 9411701 | Analog block and test blocks for testing thereof | — | 2016-08-09 |
| 9148192 | Transceiver for providing a clock signal | Alan Wong, Christopher J. Borrelli, Loren Jones, Seu Wah Low, Parag Upadhyaya +1 more | 2015-09-29 |
| 8185678 | Method and apparatus for controlling a data bus | — | 2012-05-22 |