Sreesan Venkatakrishnan — 4 Patents at AMD

Sreesan Venkatakrishnan has been granted 4 US patents while listed as an inventor at AMD. The first was granted in 2019 and the most recent in June 2025. Sreesan Venkatakrishnan ranks #1,080,739 of 4,157,543 US inventors in our database (top 26.0%). Patent records list Sreesan Venkatakrishnan in San Jose, CA, US.

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Showing 1–4 of 4 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
12327077	Deadlock detection and prevention for routing packet-switched nets in electronic systems	Nitin Deshmukh, Satish B. Sivaswamy	2025-06-10
11604751	Optimizing hardware design throughput by latency aware balancing of re-convergent paths	Brian Guttag, Nitin Deshmukh, Satish B. Sivaswamy	2023-03-14
10839125	Post-placement and post-routing physical synthesis for multi-die integrated circuits	Ruibing Lu, Sabyasachi Das	2020-11-17	$30,681,000
10496777	Physical synthesis for multi-die integrated circuit technology	Zhiyong Wang, Sabyasachi Das	2019-12-03	$49,935,000

Sreesan Venkatakrishnan — 4 Patents

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