Issued Patents All Time
Showing 26–50 of 91 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8654561 | Read methods, circuits and systems for memory devices | John Ross Jameson, John Dinh, Derric Lewis, Daniel Wang, Nad Edward Gilbert +1 more | 2014-02-18 |
| 8625331 | Methods of programming and erasing programmable metallization cells (PMCs) | Nad Edward Gilbert | 2014-01-07 |
| 8498164 | Variable impedance memory device biasing circuits and methods | Nad Edward Gilbert | 2013-07-30 |
| 8369132 | Methods of programming and erasing programmable metallization cells (PMCs) | Nad Edward Gilbert | 2013-02-05 |
| 8331128 | Reconfigurable memory arrays having programmable impedance elements and corresponding methods | Narbeh Derhacobian | 2012-12-11 |
| 8294488 | Programmable impedance element circuits and methods | Narbeh Derhacobian, John Dinh | 2012-10-23 |
| 8274842 | Variable impedance memory device having simultaneous program and erase, and corresponding methods and circuits | Nad Edward Gilbert, John Dinh | 2012-09-25 |
| 8107273 | Integrated circuits having programmable metallization cells (PMCs) and operating methods therefor | Nad Edward Gilbert | 2012-01-31 |
| 8049551 | Charge pump for switched capacitor circuits with slew-rate control of in-rush current | Jeff Kotowski | 2011-11-01 |
| 7155357 | Method and apparatus for detecting an unused state in a semiconductor circuit | — | 2006-12-26 |
| 7132873 | Method and apparatus for avoiding gated diode breakdown in transistor circuits | — | 2006-11-07 |
| 6970386 | Method and apparatus for detecting exposure of a semiconductor circuit to ultra-violet light | — | 2005-11-29 |
| 6950336 | Method and apparatus for emulating an electrically erasable programmable read only memory (EEPROM) using non-volatile floating gate memory cells | David Sowards, Trevor Blyth | 2005-09-27 |
| 6622230 | Multi-set block erase | Masaru Yano, Michael Chung | 2003-09-16 |
| 6593606 | Staggered bitline strapping of a non-volatile memory cell | Mark Randolph, Pau-Ling Chen, Richard Fastow | 2003-07-15 |
| 6583479 | Sidewall NROM and method of manufacture thereof for non-volatile memory cells | Richard Fastow, Pau-Ling Chen, Michael A. Van Buskirk, Masaaki Higashitani | 2003-06-24 |
| 6545912 | Erase verify mode to evaluate negative Vt's | Joseph G. Pawletko, Pau-Ling Chen | 2003-04-08 |
| 6538270 | Staggered bitline strapping of a non-volatile memory cell | Mark Randolph, Pau-Ling Chen, Richard Fastow | 2003-03-25 |
| 6525966 | Method and apparatus for adjusting on-chip current reference for EEPROM sensing | Joseph G. Pawletko, Binh Quang Le | 2003-02-25 |
| 6510082 | Drain side sensing scheme for virtual ground flash EPROM array with adjacent bit charge and hold | Binh Quang Le, Pau-Ling Chen, Michael A. Van Buskirk, Santosh Yachareni, Michael Chung +1 more | 2003-01-21 |
| 6504757 | Double boosting scheme for NAND to improve program inhibit characteristics | Pau-Ling Chen, Quang Binh | 2003-01-07 |
| 6477083 | Select transistor architecture for a virtual ground non-volatile memory cell array | Richard Fastow, Mark Randolph | 2002-11-05 |
| 6472898 | Method and system for testing a semiconductor memory device | Santosh Yachareni | 2002-10-29 |
| 6418054 | Embedded methodology to program/erase reference cells used in sensing flash cells | — | 2002-07-09 |
| 6411069 | Continuous capacitor divider sampled regulation scheme | — | 2002-06-25 |