Issued Patents All Time
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6881641 | Semiconductor device having a retrograde dopant profile in a channel region and method for fabricating the same | Karsten Wieczorek, Manfred Horstmann | 2005-04-19 |
| 6846708 | Semiconductor device having improved doping profiles and a method of improving the doping profiles of a semiconductor device | Thomas Feudel, Manfred Horstmann | 2005-01-25 |
| 6822430 | Method of assessing lateral dopant and/or charge carrier profiles | Thomas Feudel, Manfred Horstmann | 2004-11-23 |
| 6798028 | Field effect transistor with reduced gate delay and method of fabricating the same | Manfred Horstmann, Karsten Wieczorek, Stephan Kruegel | 2004-09-28 |
| 6770552 | Method of forming a semiconductor device having T-shaped gate structure | Karsten Wieczorek, Manfred Horstmann | 2004-08-03 |
| 6673665 | Semiconductor device having increased metal silicide portions and method of forming the semiconductor | Karsten Wieczorek, Manfred Horstmann | 2004-01-06 |
| 6620718 | Method of forming metal silicide regions on a gate electrode and on the source/drain regions of a semiconductor device | Karsten Wieczorek, Michael Raab | 2003-09-16 |
| 6593197 | Sidewall spacer based fet alignment technology | Karsten Wieczorek, Manfred Horstmann, Michael Raab | 2003-07-15 |
| 6566718 | Field effect transistor with an improved gate contact and method of fabricating the same | Karsten Wieczorek, Manfred Horstmann, Stephan Kruegel | 2003-05-20 |
| 6492210 | Method for fully self-aligned FET technology | Karsten Wieczorek, Manfred Horstmann, Michael Raab | 2002-12-10 |
| 6423634 | Method of forming low resistance metal silicide region on a gate electrode of a transistor | Karsten Wieczorek, Michael Raab | 2002-07-23 |
| 6306698 | Semiconductor device having metal silicide regions of differing thicknesses above the gate electrode and the source/drain regions, and method of making same | Karsten Wieczorek, Michael Raab | 2001-10-23 |
| 6268257 | Method of forming a transistor having a low-resistance gate electrode | Karsten Wieczorek, Michael Raab | 2001-07-31 |