Issued Patents All Time
Showing 26–50 of 76 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10283437 | Metal density distribution for double pattern lithography | Omid Rowhani, Charles P. Tung | 2019-05-07 |
| 10186510 | Vertical gate all around library architecture | — | 2019-01-22 |
| 10068794 | Gate all around device architecture with hybrid wafer bond technique | — | 2018-09-04 |
| 9704995 | Gate all around device architecture with local oxide | — | 2017-07-11 |
| 9006834 | Trench silicide and gate open with local interconnect with replacement gate process | — | 2015-04-14 |
| 8716124 | Trench silicide and gate open with local interconnect with replacement gate process | — | 2014-05-06 |
| 8624320 | Process for forming fins for a FinFET device | — | 2014-01-07 |
| 8564030 | Self-aligned trench contact and local interconnect with replacement gate process | — | 2013-10-22 |
| 8563425 | Selective local interconnect to gate in a self aligned local interconnect process | — | 2013-10-22 |
| 8397184 | Channel length scaling for footprint compatible digital library cell design | — | 2013-03-12 |
| 8347123 | Turning off clock to flip flops | — | 2013-01-01 |
| 8304172 | Semiconductor device fabrication using a multiple exposure and block mask approach to reduce design rule violations | — | 2012-11-06 |
| 8219939 | Method of creating photolithographic masks for semiconductor device features with reduced design rule violations | James C. Pattison | 2012-07-10 |
| 8099686 | CAD flow for 15nm/22nm multiple fine grained wimpy gate lengths in SIT gate flow | — | 2012-01-17 |
| 8076236 | SRAM bit cell with self-aligned bidirectional local interconnects | Donald R. Weiss | 2011-12-13 |
| 7960287 | Methods for fabricating FinFET structures having different channel lengths | Frank Scott Johnson | 2011-06-14 |
| 7829466 | Methods for fabricating FinFET structures having different channel lengths | Frank Scott Johnson | 2010-11-09 |
| 7829973 | N cell height decoupling circuit | Thomas R. O'Brien, Viswanathan Lakshmanan, David M. Ratchkov, Stefan G. Block | 2010-11-09 |
| 7818157 | Instantaneous voltage drop sensitivity analysis tool (IVDSAT) | — | 2010-10-19 |
| 7687339 | Methods for fabricating FinFET structures having different channel lengths | Frank Scott Johnson | 2010-03-30 |
| 7631209 | Turning off clock to flip flops | — | 2009-12-08 |
| 7424690 | Interconnect integrity verification | Robert D. Waldron, Norman Mause, Larry Greenhouse | 2008-09-09 |
| 7420229 | Failure analysis vehicle for yield enhancement with self test at speed burnin capability for reliability testing | Michael Schmidt | 2008-09-02 |
| 7392496 | Device for avoiding timing violations resulting from process defects in a backfilled metal layer of an integrated circuit | Thomas R. O'Brien | 2008-06-24 |
| 7370257 | Test vehicle data analysis | Gerald L. Shipley, Derryl D. J. Allman | 2008-05-06 |