Nader Radjy — 15 Patents at AMD

Nader Radjy has been granted 15 US patents while listed as an inventor at AMD. The first was granted in 1990 and the most recent in January 2000. Nader Radjy ranks #307,048 of 4,157,543 US inventors in our database (top 7.4%). Patent records list Nader Radjy in San Francisco, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–15 of 15 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
6011272	Silicided shallow junction formation and structure with high and low breakdown voltages	Farrokh Omid-Zohoor	2000-01-04	$4,612,000
5978272	Nonvolatile memory structure for programmable logic devices	Hao Fang, Sameer Haddad	1999-11-02	$2,027,000
5973372	Silicided shallow junction transistor formation and structure with high and low breakdown voltages	Farrokh Omid-Zohoor	1999-10-26
5966329	Apparatus and method for programming PMOS memory cells	Ching-Hsiang Hsu, Shang-De Ted Chang	1999-10-12
5912842	Nonvolatile PMOS two transistor memory cell and array	Shang-De Ted Chang, Vikram Kowshik, Andy Yu	1999-06-15
5598369	Flash EEPROM array with floating substrate erase operation	Jian Chen	1997-01-28	$5,134,000
5579261	Reduced column leakage during programming for a flash memory array	Lee Cleveland, Jian Chen, Shane Hollmer	1996-11-26	$12,564,000
5576991	Multistepped threshold convergence for a flash memory array	Lee Cleveland, Jian Chen, Shane Hollmer	1996-11-19	$12,511,000
5561620	Flash EEPROM array with floating substrate erase operation	Jian Chen	1996-10-01	$2,637,000
5521867	Adjustable threshold voltage conversion circuit	Jian Chen, Lee Cleveland, Shane Hollmer, Ming Sang Kwan, David Kuan-Yu Liu	1996-05-28	$7,738,000
5231602	Apparatus and method for improving the endurance of floating gate devices	Michael S. Briner	1993-07-27	$12,996,000
5191556	Method of page-mode programming flash EEPROM cell arrays	—	1993-03-02	$9,754,000
5101378	Optimized electrically erasable cell for minimum read disturb and associated method of sensing	Michael S. Briner	1992-03-31	$9,324,000
5005155	Optimized electrically erasable PLA cell for minimum read disturb	Michael S. Briner	1991-04-02	$6,236,000
4935648	Optimized E.sup.2 pal cell for minimum read disturb	Michael S. Briner	1990-06-19	$2,037,000

Nader Radjy — 15 Patents

Patents per Year

Issued Patents All Time

Patent Widget