Issued Patents All Time
Showing 26–43 of 43 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8901003 | Polishing method of semiconductor structure | Han Fang, Boon-Tiong Neo | 2014-12-02 |
| 8809143 | Fabrication of MOS device with schottky barrier controlling layer | Anup Bhalla, Xiaobin Wang, Sung-Po Wei | 2014-08-19 |
| 8785278 | Nano MOSFET with trench bottom oxide shielded and third dimensional P-body contact | Hamza Yilmaz, Daniel Ng, Daniel Calafut, Madhur Bobde, Anup Bhalla +2 more | 2014-07-22 |
| 8748268 | Method of making MOSFET integrated with schottky diode with simplified one-time top-contact trench etching | Daniel Ng, Sung-Shan Tai, Anup Bhalla | 2014-06-10 |
| 8728890 | Fabrication of MOS device with integrated Schottky diode in active region contact trench | Anup Bhalla, Xiaobin Wang, Sung-Po Wei | 2014-05-20 |
| 8692322 | Flexible Crss adjustment in a SGT MOSFET to smooth waveforms and to avoid EMI in DC-DC application | Daniel Ng, Anup Bhalla, Xiaobin Wang | 2014-04-08 |
| 8680643 | Junction barrier Schottky (JBS) with floating islands | Anup Bhalla | 2014-03-25 |
| 8643071 | Integrated snubber in a single poly MOSFET | Daniel Ng, Anup Bhalla | 2014-02-04 |
| 8586435 | Fabrication of MOSFET device with reduced breakdown voltage | Anup Bhalla | 2013-11-19 |
| 8450794 | MOS device with varying contact trench lengths | Anup Bhalla, Xiaobin Wang, Sung-Po Wei | 2013-05-28 |
| 8362552 | MOSFET device with reduced breakdown voltage | Anup Bhalla | 2013-01-29 |
| 8362585 | Junction barrier Schottky diode with enforced upper contact structure and method for robust packaging | Anup Bhalla, Daniel Ng | 2013-01-29 |
| 8362547 | MOS device with Schottky barrier controlling layer | Anup Bhalla, Xiaobin Wang, Sung-Po Wei | 2013-01-29 |
| 8283723 | MOS device with low injection diode | Anup Bhalla, Xiaobin Wang, Sung-Po Wei | 2012-10-09 |
| 8227330 | Junction barrier Schottky (JBS) with floating islands | Anup Bhalla | 2012-07-24 |
| 8093651 | MOS device with integrated schottky diode in active region contact trench | Anup Bhalla, Xiaobin Wang, Sung-Po Wei | 2012-01-10 |
| 8053808 | Layouts for multiple-stage ESD protection circuits for integrating with semiconductor power device | Yi Su, Anup Bhalla, Daniel Ng, Wei-Chuan Wang | 2011-11-08 |
| 7671439 | Junction barrier Schottky (JBS) with floating islands | Anup Bhalla | 2010-03-02 |