Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8806400 | System and method of testing through-silicon vias of a semiconductor die | — | 2014-08-12 |
| 6694466 | Method and system for improving the test quality for scan-based BIST using a general test application scheme | Huan-Chih Tsai, Kwang-Ting Cheng | 2004-02-17 |
| 6463560 | Method for implementing a bist scheme into integrated circuits for testing RTL controller-data paths in the integrated circuits | Indradeep Ghosh, Niraj K. Jha | 2002-10-08 |
| 6463561 | Almost full-scan BIST method and system having higher fault coverage and shorter test application time | Kwang-Ting Cheng, Huan-Chih Tsai | 2002-10-08 |
| 6370664 | Method and apparatus for partitioning long scan chains in scan based BIST architecture | — | 2002-04-09 |
| 6256759 | Hybrid algorithm for test point selection for scan-based BIST | Kwang-Ting Cheng, Chih-Jen Lin, Huan-Chih Tsai | 2001-07-03 |
| 6148425 | Bist architecture for detecting path-delay faults in a sequential circuit | Tapan Jyoti Chakraborty, Nilanjan Mukherjee | 2000-11-14 |
| 5680543 | Method and apparatus for built-in self-test with multiple clock circuits | — | 1997-10-21 |