TL

Ta-Chun Lee

AE Advanced Semiconductor Engineering: 3 patents #313 of 1,073Top 30%
Overall (All Time): #1,538,995 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8618677 Wirebonded semiconductor package 2013-12-31
8399776 Substrate having single patterned metal layer, and package applied with the substrate , and methods of manufacturing of the substrate and package Bernd Karl Appelt, William T. Chen, Calvin Chun Long CHEUNG, Shih-Fu Huang, Yuan-Chang Su +1 more 2013-03-19
8367473 Substrate having single patterned metal layer exposing patterned dielectric layer, chip package structure including the substrate, and manufacturing methods thereof Shih-Fu Huang, Yuan-Chang Su, Chia-Cheng Chen, Kuang-Hsiung Chen 2013-02-05