Issued Patents All Time
Showing 151–175 of 316 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7276411 | Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same | Wayne B. Grabowski | 2007-10-02 |
| 7276431 | Method of fabricating isolated semiconductor devices in epi-less substrate | Michael E. Cornell, Wai Tien Chan | 2007-10-02 |
| 7265434 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology | Michael E. Cornell, Wai Tien Chan | 2007-09-04 |
| 7238568 | Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same | Wayne B. Grabowski | 2007-07-03 |
| 7215012 | Space-efficient package for laterally conducting device | James Harnden, Allen K. Lam, Anthony Chia, Chu Weibing | 2007-05-08 |
| 7211863 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology | Michael E. Cornell, Wai Tien Chan | 2007-05-01 |
| 7202536 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology | Michael E. Cornell, Wai Tien Chan | 2007-04-10 |
| 7199970 | Damped disc drive assembly, and method for damping disc drive assembly | Daniel E. Boss | 2007-04-03 |
| 7186609 | Method of fabricating trench junction barrier rectifier | Jacek Korec | 2007-03-06 |
| 7176548 | Complementary analog bipolar transistors with trench-constrained isolation diffusion | Michael E. Cornell, Wai Tien Chan | 2007-02-13 |
| 7135738 | Modular bipolar-CMOS-DMOS analog integrated circuit and power transistor technology | Michael E. Cornell, Wai Tien Chan | 2006-11-14 |
| 7127631 | Single wire serial interface utilizing count of encoded clock pulses with reset | Kevin D'Angelo, David Alan Brown, John So, Jan Nilsson | 2006-10-24 |
| 7084456 | Trench MOSFET with recessed clamping diode using graded doping | Michael E. Cornell, Wai Tien Chan | 2006-08-01 |
| 7075145 | Poly-sealed silicide trench gate | Michael E. Cornell, Wai Tien Chan | 2006-07-11 |
| 7057273 | Surface mount package | James Harnden, Anthony Chia, Chu Weibing | 2006-06-06 |
| 7052963 | Method of forming trench transistor with chained implanted body including a plurality of implantation with different energies | Wayne B. Grabowski | 2006-05-30 |
| D513608 | Portion of a matrix for surface mount package leadframe | James Harnden, Anthony Chia, Chu Weibing, Allen K. Lam | 2006-01-17 |
| 6969888 | Planarized and silicided trench contact | Michael E. Cornell, Wai Tien Chan | 2005-11-29 |
| 6943426 | Complementary analog bipolar transistors with trench-constrained isolation diffusion | Michael E. Cornell, Wai Tien Chan | 2005-09-13 |
| 6924198 | Self-aligned trench transistor using etched contact | Wayne B. Grabowski | 2005-08-02 |
| 6906386 | Testable electrostatic discharge protection circuits | Michael E. Cornell, Wai Tien Chan | 2005-06-14 |
| 6900100 | Trench semiconductor device having gate oxide layer with multiple thicknesses and processes of fabricating the same | Wayne B. Grabowski | 2005-05-31 |
| 6900091 | Isolated complementary MOS devices in epi-less substrate | Michael E. Cornell, Wai Tien Chan | 2005-05-31 |
| D505122 | Portion of a matrix for surface mount package leadframe | James Harnden, Anthony Chia, Chu Weibing, Allen K. Lam | 2005-05-17 |
| D505121 | Portion of a matrix for surface mount package leadframe | James Harnden, Anthony Chia, Chu Weibing, Allen K. Lam | 2005-05-17 |