WW

Wayne W. Wong

AC Actel: 9 patents #31 of 156Top 20%
Broadcom: 1 patents #5,847 of 9,346Top 65%
Overall (All Time): #462,188 of 4,157,543Top 15%
11
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
9344268 Phase alignment architecture for ultra high-speed data path Ali Nazemi, Burak Catli, Kangmin Hu, Hyo Gyuem Rhew, Delong Cui +3 more 2016-05-17
7941685 Delay locked loop for an FPGA architecture William C. Plants, Nikhil Mazumder, Arunangshu Kundu, James D. Joseph 2011-05-10
7558967 Encryption for a stream file in an FPGA integrated circuit — 2009-07-07
7549138 Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Shin-Nan Sun 2009-06-16
7484113 Delay locked loop for an FPGA architecture William C. Plants, Nikhil Mazumder, Arunangshu Kundu, James D. Joseph 2009-01-27
7269814 Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Shin-Nan Sun 2007-09-11
7171575 Delay locked loop for and FPGA architecture William C. Plants, Nikhil Mazumder, Arunangshu Kundu, James D. Joseph 2007-01-30
7111272 Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Shin-Nan Sun 2006-09-19
6976185 Delay locked loop for an FPGA architecture William C. Plants, Nikhil Mazumder, Arunangshu Kundu, James D. Joseph 2005-12-13
6885218 Parallel programmable antifuse field programmable gate array device (FPGA) and a method for programming and testing an antifuse FPGA Shin-Nan Sun 2005-04-26
6718477 Delay locked loop for an FPGA architecture William C. Plants, Nikhil Mazumder, Arunangshu Kundu, James D. Joseph 2004-04-06