Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
MR

Michael Riepe — 4 Patents

ASAchronix Semiconductor: 2 patents #25 of 38Top 70%
MAMagma Design Automation: 2 patents #11 of 56Top 20%
San Jose, CA: #12,472 of 32,062 inventorsTop 40%
California: #126,026 of 386,348 inventorsTop 35%
Overall (All Time): #1,080,739 of 4,157,543Top 30%
4 Patents All Time
Michael Riepe has been granted 4 US patents while listed as an inventor at Achronix Semiconductor. The first was granted in 2005 and the most recent in September 2024. Michael Riepe ranks #1,080,739 of 4,157,543 US inventors in our database (top 26.0%). Patent records list Michael Riepe in San Jose, CA, US.

Patents per Year

Patents granted per year, 2005 to 2024Bar chart with a peak of 1 patents in 2005.peak 12005: 1 patents20052006: 1 patents20062023: 1 patents20232024: 1 patents2024

Issued Patents All Time

Showing 1–4 of 4 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12093623 Relocatable FPGA modules Kamal Choundhary, Amit Singh, Shirish Jawale, Karl Koehler, Simon Longcroft +3 more 2024-09-17
11853669 Relocatable FPGA modules Kamal Choundhary, Amit Singh, Shirish Jawale, Karl Koehler, Simon Longcroft +3 more 2023-12-26
7103863 Representing the design of a sub-module in a hierarchical integrated circuit design and analysis system Robert M. Swanson, Timothy Michael Burks, Lukas P. P. P. van Ginneken, Karen F. Vahtra, Hamid Savoj 2006-09-05 $2,569,000
6845494 Method for generating design constraints for modules in a hierarchical integrated circuit design system Timothy Michael Burks, Hamid Savoj, Robert M. Swanson, Karen E. Vahtra, Lukas P. P. P. van Ginneken 2005-01-18 $3,995,000