Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
Home › Representing the design of a sub-module in a hierarchical integrated circuit design and analysis system

Representing the design of a sub-module in a hierarchical integrated circuit design and analysis system

US Patent 7103863 · Granted Sep 5, 2006

Estimated economic value: $2,569,000 ⓘ

Assignee

Inventors

View full patent text on Google Patents →

More Patents by These Inventors

Relocatable FPGA modules2024
Relocatable FPGA modules2023
Timing closure methodology including placement with initial delay values2017
Remote verification for configuration updates2017
Image manipulation for web content2016
Remote verification for configuration updates2015
Remote verification for configuration updates2014
Timing closure methodology including placement with initial delay values2013
Parametric timing analysis2011
System for protecting bearings and seals of a refrigerant compressor2011
Selection of optimal clock gating elements2011
Clock gating by usage of implied constants2010