Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6845494 | Method for generating design constraints for modules in a hierarchical integrated circuit design system | Timothy Michael Burks, Michael Riepe, Hamid Savoj, Robert M. Swanson, Lukas P. P. P. van Ginneken | 2005-01-18 |