Issued Patents 2025
Showing 51–61 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12211820 | Wafer bonding apparatus and method | Cheng-I Chu, Han-De Chen, Chen-Fong Tsai, Jyh-Cherng Sheu, Huicheng Chang | 2025-01-28 |
| 12211901 | Semiconductor device having a doped fin well | Bau-Ming Wang, Che-Fu Chiu, Chun-Feng Nieh, Huicheng Chang | 2025-01-28 |
| 12205994 | Sacrificial layer for semiconductor process | Tsan-Chun Wang, Su-Hao Liu, Liang-Yin Chen, Huicheng Chang | 2025-01-21 |
| 12198931 | Ion implantation method for reducing roughness of patterned resist lines | Chun-Liang Chen, Wei-Ting Chien, Liang-Yin Chen, Huicheng Chang | 2025-01-14 |
| 12199156 | Contact formation with reduced dopant loss and increased dimensions | Meng-Han Chou, Yi-Syuan Siao, Su-Hao Liu, Huicheng Chang | 2025-01-14 |
| 12191393 | Low Ge isolated epitaxial layer growth over nano-sheet architecture design for RP reduction | Yan-Ting Lin, Yen-Ru Lee, Chien-Chang Su, Chih-Yun Chin, Chien-Wei Lee +2 more | 2025-01-07 |
| 12191378 | Fin field effect transistor device structure | Ta-Chun Ma | 2025-01-07 |
| 12191369 | Source and drain engineering process for multigate devices | Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng +2 more | 2025-01-07 |
| 12191304 | Method of manufacturing a semiconductor device and a semiconductor device | Tung Ying Lee, Ziwei Fang, Meng-Hsuan Hsiao | 2025-01-07 |
| 12191212 | Semiconductor method and device | Yi-Cheng Li, Pin-Ju Liang, Ta-Chun Ma, Pei-Ren Jeng | 2025-01-07 |
| 12191174 | Semiconductor processing tool and method of using an embedded chamber | Chia-Cheng Chen, Chih-Kai Yang, Chun-Liang Chen, Wei-Ting Chien, Liang-Yin Chen +1 more | 2025-01-07 |