Issued Patents 2025
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12368109 | Interposer structure for semiconductor package including peripheral metal pad around alignment mark and methods of fabricating same | Hsien-Wei Chen, Shin-Puu Jeng | 2025-07-22 |
| 12354938 | Semiconductor package and methods of manufacturing | Hsien-Wei Chen, Shin-Puu Jeng | 2025-07-08 |
| 12354989 | Package structure with conductive via structure | Po-Yao Chuang, Shin-Puu Jeng | 2025-07-08 |
| 12308321 | Structures to increase substrate routing density and methods of forming the same | Hsien-Wei Chen, Shin-Puu Jeng | 2025-05-20 |
| 12308322 | Dual-sided routing in 3D semiconductor system-in-package structure and methods of forming the same | Po-Hao Tsai, Po-Yao Chuang, Yi-Wen Wu, Shin-Puu Jeng, Techi Wong | 2025-05-20 |
| 12300592 | Fan-out package with controllable standoff | Po-Hao Tsai, Techi Wong, Meng-Wei Chou, Po-Yao Chuang, Shin-Puu Jeng | 2025-05-13 |
| 12205861 | Manufacturing method of semiconductor package including forming cavity in circuit substrate without exposing floor plate | Po-Yao Chuang, Te-Chi Wong, Shuo-Mao Chen, Shin-Puu Jeng | 2025-01-21 |
| 12199084 | Fan-out package with cavity substrate | Po-Hao Tsai, Techi Wong, Po-Yao Chuang, Shin-Puu Jeng, Meng-Wei Chou | 2025-01-14 |