Issued Patents 2025
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12426380 | Integrated circuit having angled conductive feature | Tung-Heng Hsieh, Ting-Wei Chiang, Chung-Te Lin, Hui-Zhong Zhuang, Sheng-Hsiung Wang | 2025-09-23 |
| 12419114 | Integrated circuit | Jian-Sing Li, Guo-Huei Wu, Hui-Zhong Zhuang, Chih-Liang Chen | 2025-09-16 |
| 12393762 | Method for generating a layout diagram of a semiconductor device including power-grid- adapted route-spacing | Shun Li Chen, Ting-Wei Chiang, Ting Yu Chen, XinYong WANG | 2025-08-19 |
| 12381148 | Buried pad for use with gate-all-around device | Guo-Huei Wu, Pochun Wang, Chih-Liang Chen | 2025-08-05 |
| 12363982 | Integrated circuit layouts with source and drain contacts of different widths | Shang-Syuan Ciou, Hui-Zhong Zhuang, Jung-Chan Yang | 2025-07-15 |
| 12321680 | Integrated circuit fin structure | Po-Hsiang Huang, Fong-Yuan Chang, Clement Hsingjen Wann, Chih-Hsin Ko, Sheng-Hsiung Chen +1 more | 2025-06-03 |
| 12317589 | Power rail and signal conducting line arrangement | Guo-Huei Wu, Shih-Wei Peng, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen +1 more | 2025-05-27 |
| 12300699 | Integrated circuit | Guo-Huei Wu, Chi-Yu Lu, Ting Yu Chen | 2025-05-13 |
| 12299373 | Reduced area standard cell abutment configurations | Chi-Yu Lu, Hui-Zhong Zhuang, Pin-Dai Sue, Yi-Hsin Ko | 2025-05-13 |
| 12283590 | Integrated circuit and manufacturing method thereof | Xin-Yong WANG, Chih-Liang Chen | 2025-04-22 |
| 12277378 | Integrated circuit structure | Hui-Zhong Zhuang, Ting-Wei Chiang, Shun Li Chen, Lee-Chung Lu | 2025-04-15 |
| 12271678 | Integrated circuit with constrained metal line arrangement, method of using, and system for using | XinYong WANG, Qiquan Wang, Yuan Ma | 2025-04-08 |
| 12255199 | Multi-bit structure | Shao-Lun Chien, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen | 2025-03-18 |
| 12255142 | Cell structure with intermediate metal layers for power supplies | Chih-Liang Chen, Hui-Zhong Zhuang, Shun Li Chen, Ting Yu Chen | 2025-03-18 |
| 12243867 | Integrated circuit device and method | Chien-Ying Chen, Lee-Chung Lu, Ta-Pen Guo | 2025-03-04 |
| 12243822 | Method of manufacturing integrated circuit | Chih-Yu Lai, Hui-Zhong Zhuang, Chih-Liang Chen | 2025-03-04 |
| 12243914 | Different height cell subregions, semiconductor device having the same, and method of generating a layout diagram corresponding to the same | Jung-Chan Yang, Hui-Zhong Zhuang, Lee-Chung Lu, Ting-Wei Chiang | 2025-03-04 |
| 12237332 | Integrated circuit | Guo-Huei Wu, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen | 2025-02-25 |
| 12224278 | Active zones with offset in semiconductor cell | Guo-Huei Wu, Chih-Liang Chen | 2025-02-11 |
| 12218132 | Integrated circuit | Guo-Huei Wu, Po-Chun Wang, Hui-Zhong Zhuang, Chih-Liang Chen | 2025-02-04 |
| 12218058 | Integrated circuits having stacked transistors and backside power nodes | Chih-Yu Lai, Chih-Liang Chen | 2025-02-04 |
| 12211791 | Semiconductor device including deep vias | Ta-Pen Guo, Chien-Ying Chen, Lee-Chung Lu | 2025-01-28 |
| 12211851 | Semiconductor device including standard cells | Ta-Pen Guo, Lee-Chung Lu | 2025-01-28 |
| 12205899 | Method of making semiconductor device including buried conductive fingers | Chih-Liang Chen, Guo-Huei Wu | 2025-01-21 |
| 12199037 | Standard and engineering change order (ECO) cell regions and semiconductor device including the same | Shun Li Chen, Ting-Wei Chiang, Ting Yu Chen, XinYong WANG | 2025-01-14 |