Issued Patents 2025
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12431428 | Integrated circuits and methods for power delivery | Ming Chian Tsai, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-09-30 |
| 12426323 | Semiconductor device including vertical transistor with back side power structure | Te-Hsin Chiu, Jiann-Tyng Tzeng | 2025-09-23 |
| 12402415 | Integrated circuit with backside power rail and backside interconnect | Guo-Huei Wu, Jiann-Tyng Tzeng | 2025-08-26 |
| 12400964 | Integrated circuit | Chia-Tien Wu, Jiann-Tyng Tzeng | 2025-08-26 |
| 12388013 | Three dimensional integrated circuit with monolithic inter-tier vias (MIV) | Jiann-Tyng Tzeng, Kam-Tou Sio, Wei-Cheng Lin, Wei-An Lai | 2025-08-12 |
| 12388016 | Deep lines and shallow lines in signal conducting paths | Wei-An Lai, Te-Hsin Chiu, Wei-Cheng Lin, Jiann-Tyng Tzeng, Chia-Tien Wu | 2025-08-12 |
| 12368106 | Diagonal vias in semiconductor structures | Chia-Tien Wu, Jiann-Tyng Tzeng | 2025-07-22 |
| 12367332 | Mixed poly pitch design solution for power trim | Lipen Yuan, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2025-07-22 |
| 12339321 | Semiconductor device and method of failure analysis for semiconductor device | Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-06-24 |
| 12341098 | Metal patterning for internal cell routing | Chih-Liang Chen, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2025-06-24 |
| 12336296 | Semiconductor device including source/drain contact having height below gate stack | Charles Chew-Yuen Young, Chih-Liang Chen, Chih-Ming Lai, Jiann-Tyng Tzeng, Shun Li Chen +3 more | 2025-06-17 |
| 12334179 | Cell structures and power routing for integrated circuits | Jiann-Tyng Tzeng, Kam-Tou Sio | 2025-06-17 |
| 12321679 | Integrated circuit, system and method of forming the same | Te-Hsin Chiu, Jiann-Tyng Tzeng | 2025-06-03 |
| 12314650 | Integrated circuit device and manufacturing method of the same | Ching-Yu Huang, Wei-Cheng TZENG, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-05-27 |
| 12317589 | Power rail and signal conducting line arrangement | Guo-Huei Wu, Wei-Cheng Lin, Hui-Zhong Zhuang, Chih-Liang Chen, Li-Chun Tien +1 more | 2025-05-27 |
| 12315804 | Back side signal routing in a circuit with a relay cell | Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-05-27 |
| 12299372 | Mixed poly pitch design solution for power trim | Lipen Yuan, Jiann-Tyng Tzeng, Wei-Cheng Lin | 2025-05-13 |
| 12300609 | Two-dimensional (2D) metal structure and method of forming the same | Jiann-Tyng Tzeng, Ken-Hsien Hsieh | 2025-05-13 |
| 12300623 | Integrated circuit | Chia-Tien Wu, Jiann-Tyng Tzeng | 2025-05-13 |
| 12300608 | Method of manufacturing semiconductor device | Hui-Ting Yang, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-05-13 |
| 12288785 | Layout designs of integrated circuits having backside routing tracks | Wei-An Lai, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-04-29 |
| 12283546 | Integrated circuit and method for forming the same | Wei-Cheng Lin, Cheng-Chi Chuang, Jiann-Tyng Tzeng | 2025-04-22 |
| 12283477 | Method of manufacturing a semiconductor device | Chia-Tien Wu, Jiann-Tyng Tzeng | 2025-04-22 |
| 12278185 | Power distribution method | Te-Hsin Chiu, Jiann-Tyng Tzeng | 2025-04-15 |
| 12278238 | Semiconductor structure and method of forming the same | Te-Hsin Chiu, Wei-Cheng Lin, Jiann-Tyng Tzeng | 2025-04-15 |