Issued Patents 2024
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date | Approx Value ⓘ |
|---|---|---|---|---|
| 12137169 | Low latency post-quantum signature verification for fast secure-boot | Santosh Ghosh, Vikram Suresh, Sanu K. Mathew, Manoj Sastry, Andrew H. Reinders +1 more | 2024-11-05 | $48,202,000 |
| 12047485 | Time and frequency domain side-channel leakage suppression using integrated voltage regulator cascaded with runtime crypto arithmetic transformations | Xiaosen Liu, Harish Krishnamurthy, Sanu K. Mathew, Vikram Suresh | 2024-07-23 | $20,446,000 |
| 11917053 | Combined SHA2 and SHA3 based XMSS hardware accelerator | Santosh Ghosh, Vikram Suresh, Sanu K. Mathew, Manoj Sastry, Andrew H. Reinders +1 more | 2024-02-27 | $28,450,000 |