Issued Patents 2024
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12137169 | Low latency post-quantum signature verification for fast secure-boot | Santosh Ghosh, Vikram Suresh, Sanu K. Mathew, Manoj Sastry, Raghavan Kumar +1 more | 2024-11-05 |
| 11917053 | Combined SHA2 and SHA3 based XMSS hardware accelerator | Santosh Ghosh, Vikram Suresh, Sanu K. Mathew, Manoj Sastry, Raghavan Kumar +1 more | 2024-02-27 |