Issued Patents 2024
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12047485 | Time and frequency domain side-channel leakage suppression using integrated voltage regulator cascaded with runtime crypto arithmetic transformations | Raghavan Kumar, Harish Krishnamurthy, Sanu K. Mathew, Vikram Suresh | 2024-07-23 |
| 11940824 | Techniques in hybrid regulators of high power supply rejection ratio and conversion efficiency | Harish Krishnamurthy, Krishnan Ravichandran, Vivek K. De, Scott Chiu, Claudia Patricia Barrera Gonzalez +2 more | 2024-03-26 |